This repository has been archived on 2022-01-28. You can view files and clone it, but cannot push or open issues or pull requests.
Marlin-Artillery-M600/buildroot/share/PlatformIO/variants/MARLIN_F103Vx/variant.cpp

236 lines
6.4 KiB
C++
Raw Permalink Normal View History

/*
*******************************************************************************
* Copyright (c) 2019, STMicroelectronics
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
*******************************************************************************
*/
#include "pins_arduino.h"
#ifdef __cplusplus
extern "C" {
#endif
// Digital PinName array
const PinName digitalPin[] = {
PA_0, //D0
PA_1, //D1
PA_2, //D2
PA_3, //D3
PA_4, //D4
PA_5, //D5
PA_6, //D6
PA_7, //D7
PA_8, //D8
PA_9, //D9
PA_10, //D10
PA_11, //D11
PA_12, //D12
PA_13, //D13
PA_14, //D14
PA_15, //D15
PB_0, //D16
PB_1, //D17
PB_2, //D18
PB_3, //D19
PB_4, //D20
PB_5, //D21
PB_6, //D22
PB_7, //D23
PB_8, //D24
PB_9, //D25
PB_10, //D26
PB_11, //D27
PB_12, //D28
PB_13, //D29
PB_14, //D30
PB_15, //D31
PC_0, //D32
PC_1, //D33
PC_2, //D34
PC_3, //D35
PC_4, //D36
PC_5, //D37
PC_6, //D38
PC_7, //D39
PC_8, //D40
PC_9, //D41
PC_10, //D42
PC_11, //D43
PC_12, //D44
PC_13, //D45
PC_14, //D46
PC_15, //D47
PD_0, //D48
PD_1, //D49
PD_2, //D50
PD_3, //D51
PD_4, //D52
PD_5, //D53
PD_6, //D54
PD_7, //D55
PD_8, //D56
PD_9, //D57
PD_10, //D58
PD_11, //D59
PD_12, //D60
PD_13, //D61
PD_14, //D62
PD_15, //D63
PE_0, //D64
PE_1, //D65
PE_2, //D66
PE_3, //D67
PE_4, //D68
PE_5, //D69
PE_6, //D70
PE_7, //D71
PE_8, //D72
PE_9, //D73
PE_10, //D74
PE_11, //D75
PE_12, //D76
PE_13, //D77
PE_14, //D78
PE_15, //D79
};
// Analog (Ax) pin number array
const uint32_t analogInputPin[] = {
0, // A0, PA0
1, // A1, PA1
2, // A2, PA2
3, // A3, PA3
4, // A4, PA4
5, // A5, PA5
6, // A6, PA6
7, // A7, PA7
16, // A8, PB0
17, // A9, PB1
32, // A10, PC0
33, // A11, PC1
34, // A12, PC2
35, // A13, PC3
36, // A14, PC4
37, // A15, PC5
};
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
static bool SetSysClock_PLL_HSE(bool bypass)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
bool ret = false;
/* Initializes the CPU, AHB and APB busses clocks */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
if (bypass == false) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
}
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
/* Initializes the CPU, AHB and APB busses clocks */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK) {
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) {
ret = true;
}
}
}
return ret;
}
/******************************************************************************/
/* PLL (clocked by HSI) used as System clock source */
/******************************************************************************/
bool SetSysClock_PLL_HSI(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
bool ret = false;
/* Initializes the CPU, AHB and APB busses clocks */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
/* Initializes the CPU, AHB and APB busses clocks */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) == HAL_OK) {
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) {
ret = true;
}
}
}
return ret;
}
WEAK void SystemClock_Config(void)
{
/*
* If HSE_VALUE is not 8MHz and you want use it, then:
* - Redefine HSE_VALUE to the correct HSE_VALUE
* - Redefine SystemClock_Config() with the correct settings
*/
#if HSE_VALUE == 8000000U
/* 1- Try to start with HSE and external 8MHz xtal */
if (SetSysClock_PLL_HSE(false) == false) {
/* 2- If fail try to start with HSE and external clock */
if (SetSysClock_PLL_HSE(true) == false) {
#endif
/* 3- If fail start with HSI clock */
if (SetSysClock_PLL_HSI() == false) {
Error_Handler();
}
#if HSE_VALUE == 8000000U
}
}
#endif
}
#ifdef __cplusplus
}
#endif