2016-03-25 07:19:46 +01:00
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/**
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2016-03-24 19:01:20 +01:00
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* Marlin 3D Printer Firmware
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2019-02-12 22:06:53 +01:00
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* Copyright (C) 2019 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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2016-03-24 19:01:20 +01:00
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*
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* Based on Sprinter and grbl.
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* Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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2017-11-03 02:57:08 +01:00
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// NOTE - the HAL version of the rrd device uses a generic ST7920 device. See the
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// file u8g_dev_st7920_128x64_HAL.cpp for the HAL version.
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2013-06-07 00:49:25 +02:00
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2017-11-19 20:37:33 +01:00
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#include "../../inc/MarlinConfig.h"
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2018-11-05 01:15:18 +01:00
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#if ENABLED(U8GLIB_ST7920) && !defined(U8G_HAL_LINKS) && !defined(__SAM3X8E__)
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2017-06-18 01:36:10 +02:00
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2018-11-13 08:47:45 +01:00
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#include "ultralcd_st7920_u8glib_rrd_AVR.h"
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2016-06-04 14:54:20 +02:00
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2016-06-26 03:32:13 +02:00
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#ifndef ST7920_DELAY_1
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#define ST7920_DELAY_1 CPU_ST7920_DELAY_1
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#endif
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#ifndef ST7920_DELAY_2
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#define ST7920_DELAY_2 CPU_ST7920_DELAY_2
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#endif
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#ifndef ST7920_DELAY_3
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#define ST7920_DELAY_3 CPU_ST7920_DELAY_3
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#endif
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2018-11-13 08:47:45 +01:00
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// Optimize this code with -O3
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#pragma GCC optimize (3)
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2018-02-14 04:59:18 +01:00
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#define ST7920_SND_BIT \
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WRITE(ST7920_CLK_PIN, LOW); ST7920_DELAY_1; \
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WRITE(ST7920_DAT_PIN, val & 0x80); ST7920_DELAY_2; \
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WRITE(ST7920_CLK_PIN, HIGH); ST7920_DELAY_3; \
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val <<= 1
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2018-11-13 08:47:45 +01:00
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// Optimize this code with -O3
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#pragma GCC optimize (3)
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void ST7920_SWSPI_SND_8BIT(uint8_t val) {
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2018-02-14 04:59:18 +01:00
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ST7920_SND_BIT; // 1
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ST7920_SND_BIT; // 2
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ST7920_SND_BIT; // 3
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ST7920_SND_BIT; // 4
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ST7920_SND_BIT; // 5
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ST7920_SND_BIT; // 6
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ST7920_SND_BIT; // 7
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ST7920_SND_BIT; // 8
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}
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2015-10-03 08:08:58 +02:00
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uint8_t u8g_dev_rrd_st7920_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
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uint8_t i, y;
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switch (msg) {
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case U8G_DEV_MSG_INIT: {
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2017-08-03 00:45:42 +02:00
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OUT_WRITE(ST7920_CS_PIN, LOW);
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2017-11-19 20:37:33 +01:00
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OUT_WRITE(ST7920_DAT_PIN, LOW);
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2018-02-14 04:59:18 +01:00
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OUT_WRITE(ST7920_CLK_PIN, HIGH);
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2017-08-03 00:45:42 +02:00
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2015-10-03 08:08:58 +02:00
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ST7920_CS();
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2019-02-20 11:01:07 +01:00
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u8g_Delay(120); // Initial delay for boot up
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2015-10-03 08:08:58 +02:00
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ST7920_SET_CMD();
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2019-02-20 11:01:07 +01:00
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ST7920_WRITE_BYTE(0x20); // Non-extended mode
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ST7920_WRITE_BYTE(0x08); // Display off, cursor+blink off
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ST7920_WRITE_BYTE(0x01); // Clear DDRAM ram
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u8g_Delay(15); // Delay for DDRAM clear
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ST7920_WRITE_BYTE(0x24); // Extended mode
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ST7920_WRITE_BYTE(0x26); // Extended mode + GDRAM active
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for (y = 0; y < (LCD_PIXEL_HEIGHT) / 2; y++) { // Clear GDRAM
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ST7920_WRITE_BYTE(0x80 | y); // Set y
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ST7920_WRITE_BYTE(0x80); // Set x = 0
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2015-10-03 08:08:58 +02:00
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ST7920_SET_DAT();
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2019-02-20 11:01:07 +01:00
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for (i = 0; i < 2 * (LCD_PIXEL_WIDTH) / 8; i++) // 2x width clears both segments
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2018-02-14 04:59:18 +01:00
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ST7920_WRITE_BYTE(0);
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2013-06-07 00:49:25 +02:00
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ST7920_SET_CMD();
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}
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2019-02-20 11:01:07 +01:00
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ST7920_WRITE_BYTE(0x0C); // Display on, cursor+blink off
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2015-10-03 08:08:58 +02:00
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ST7920_NCS();
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}
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break;
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2017-11-03 02:57:08 +01:00
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2017-12-05 09:18:25 +01:00
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case U8G_DEV_MSG_STOP: break;
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case U8G_DEV_MSG_PAGE_NEXT: {
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2015-10-03 08:08:58 +02:00
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uint8_t* ptr;
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u8g_pb_t* pb = (u8g_pb_t*)(dev->dev_mem);
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y = pb->p.page_y0;
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ptr = (uint8_t*)pb->buf;
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ST7920_CS();
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for (i = 0; i < PAGE_HEIGHT; i ++) {
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ST7920_SET_CMD();
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if (y < 32) {
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2019-02-20 11:01:07 +01:00
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ST7920_WRITE_BYTE(0x80 | y); // y
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ST7920_WRITE_BYTE(0x80); // x = 0
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2015-10-03 08:08:58 +02:00
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}
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else {
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2019-02-20 11:01:07 +01:00
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ST7920_WRITE_BYTE(0x80 | (y - 32)); // y
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ST7920_WRITE_BYTE(0x80 | 8); // x = 64
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2013-06-07 00:49:25 +02:00
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}
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2015-10-03 08:08:58 +02:00
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ST7920_SET_DAT();
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2019-02-20 11:01:07 +01:00
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ST7920_WRITE_BYTES(ptr, (LCD_PIXEL_WIDTH) / 8); // ptr incremented inside of macro!
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2015-10-03 08:08:58 +02:00
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y++;
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2013-06-07 00:49:25 +02:00
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}
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2015-10-03 08:08:58 +02:00
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ST7920_NCS();
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}
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break;
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2013-06-07 00:49:25 +02:00
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}
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2016-11-25 04:49:55 +01:00
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#if PAGE_HEIGHT == 8
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return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
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#elif PAGE_HEIGHT == 16
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return u8g_dev_pb16h1_base_fn(u8g, dev, msg, arg);
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#else
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return u8g_dev_pb32h1_base_fn(u8g, dev, msg, arg);
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#endif
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2013-06-07 00:49:25 +02:00
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}
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2016-03-15 09:10:57 +01:00
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uint8_t u8g_dev_st7920_128x64_rrd_buf[(LCD_PIXEL_WIDTH) * (PAGE_HEIGHT) / 8] U8G_NOCOMMON;
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2015-10-03 08:08:58 +02:00
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u8g_pb_t u8g_dev_st7920_128x64_rrd_pb = {{PAGE_HEIGHT, LCD_PIXEL_HEIGHT, 0, 0, 0}, LCD_PIXEL_WIDTH, u8g_dev_st7920_128x64_rrd_buf};
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u8g_dev_t u8g_dev_st7920_128x64_rrd_sw_spi = {u8g_dev_rrd_st7920_128x64_fn, &u8g_dev_st7920_128x64_rrd_pb, &u8g_com_null_fn};
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2013-06-07 00:49:25 +02:00
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Decrease the needed nops to 1
by shitfing the left shift into the high phase.
```
2 cbi 0x2,1 ;set CLK //
1 in r18,__SREG__ //1
1-3 sbrc r24,7 //2-4
2 rjmp .L19 //4
1 cli .L19: //5
2 lds r25,258 lds r25,258 //7
1 andi r25,lo8(-2) ori r25,lo8(1) //8
2 sts 258,r25 sts 258,r25 //10
1 out __SREG__,r18 out __SREG__,r18 //11
2 .L3: rjmp .L3 //13 //2
2 sbi 0x2,1 ;reset CLK // //13-15 //2-4
1 lsl r24 ; val //1
1 nop //2
2 cbi 0x2,1 ;set CLK //4
...
```
2016-06-07 13:45:35 +02:00
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#pragma GCC reset_options
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2013-06-07 00:49:25 +02:00
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2018-11-05 01:15:18 +01:00
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#endif // U8GLIB_ST7920 && !U8G_HAL_LINKS && !__SAM3X8E__
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