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Use fastio for HAL SPI EEPROM

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This commit is contained in:
Scott Lahteine 2017-11-05 19:20:03 -06:00
parent 297666ea14
commit 185dec800b
1 changed files with 14 additions and 14 deletions
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28
Marlin/src/HAL/SpiEeprom.cpp
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@ -44,12 +44,12 @@ uint8_t eeprom_read_byte(uint8_t* pos) {
eeprom_temp[0] = CMD_READ; eeprom_temp[0] = CMD_READ;
eeprom_temp[1] = ((unsigned)pos>>8) & 0xFF; // addr High eeprom_temp[1] = ((unsigned)pos>>8) & 0xFF; // addr High
eeprom_temp[2] = (unsigned)pos& 0xFF; // addr Low eeprom_temp[2] = (unsigned)pos& 0xFF; // addr Low
digitalWrite(SPI_EEPROM1_CS, HIGH); WRITE(SPI_EEPROM1_CS, HIGH);
digitalWrite(SPI_EEPROM1_CS, LOW); WRITE(SPI_EEPROM1_CS, LOW);
spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 3); spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 3);
v = spiRec(SPI_CHAN_EEPROM1); v = spiRec(SPI_CHAN_EEPROM1);
digitalWrite(SPI_EEPROM1_CS, HIGH); WRITE(SPI_EEPROM1_CS, HIGH);
return v; return v;
} }
@ -62,14 +62,14 @@ void eeprom_read_block(void* dest, const void* eeprom_address, size_t n) {
eeprom_temp[0] = CMD_READ; eeprom_temp[0] = CMD_READ;
eeprom_temp[1] = ((unsigned)eeprom_address>>8) & 0xFF; // addr High eeprom_temp[1] = ((unsigned)eeprom_address>>8) & 0xFF; // addr High
eeprom_temp[2] = (unsigned)eeprom_address& 0xFF; // addr Low eeprom_temp[2] = (unsigned)eeprom_address& 0xFF; // addr Low
digitalWrite(SPI_EEPROM1_CS, HIGH); WRITE(SPI_EEPROM1_CS, HIGH);
digitalWrite(SPI_EEPROM1_CS, LOW); WRITE(SPI_EEPROM1_CS, LOW);
spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 3); spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 3);
uint8_t *p_dest = (uint8_t *)dest; uint8_t *p_dest = (uint8_t *)dest;
while (n--) while (n--)
*p_dest++ = spiRec(SPI_CHAN_EEPROM1); *p_dest++ = spiRec(SPI_CHAN_EEPROM1);
digitalWrite(SPI_EEPROM1_CS, HIGH); WRITE(SPI_EEPROM1_CS, HIGH);
} }
void eeprom_write_byte(uint8_t* pos, uint8_t value) { void eeprom_write_byte(uint8_t* pos, uint8_t value) {
@ -77,20 +77,20 @@ void eeprom_write_byte(uint8_t* pos, uint8_t value) {
/*write enable*/ /*write enable*/
eeprom_temp[0] = CMD_WREN; eeprom_temp[0] = CMD_WREN;
digitalWrite(SPI_EEPROM1_CS, LOW); WRITE(SPI_EEPROM1_CS, LOW);
spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 1); spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 1);
digitalWrite(SPI_EEPROM1_CS, HIGH); WRITE(SPI_EEPROM1_CS, HIGH);
delay(1); delay(1);
/*write addr*/ /*write addr*/
eeprom_temp[0] = CMD_WRITE; eeprom_temp[0] = CMD_WRITE;
eeprom_temp[1] = ((unsigned)pos>>8) & 0xFF; //addr High eeprom_temp[1] = ((unsigned)pos>>8) & 0xFF; //addr High
eeprom_temp[2] = (unsigned)pos & 0xFF; //addr Low eeprom_temp[2] = (unsigned)pos & 0xFF; //addr Low
digitalWrite(SPI_EEPROM1_CS, LOW); WRITE(SPI_EEPROM1_CS, LOW);
spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 3); spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 3);
spiSend(SPI_CHAN_EEPROM1, value); spiSend(SPI_CHAN_EEPROM1, value);
digitalWrite(SPI_EEPROM1_CS, HIGH); WRITE(SPI_EEPROM1_CS, HIGH);
delay(7); // wait for page write to complete delay(7); // wait for page write to complete
} }
@ -99,20 +99,20 @@ void eeprom_update_block(const void* src, void* eeprom_address, size_t n) {
/*write enable*/ /*write enable*/
eeprom_temp[0] = CMD_WREN; eeprom_temp[0] = CMD_WREN;
digitalWrite(SPI_EEPROM1_CS, LOW); WRITE(SPI_EEPROM1_CS, LOW);
spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 1); spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 1);
digitalWrite(SPI_EEPROM1_CS, HIGH); WRITE(SPI_EEPROM1_CS, HIGH);
delay(1); delay(1);
/*write addr*/ /*write addr*/
eeprom_temp[0] = CMD_WRITE; eeprom_temp[0] = CMD_WRITE;
eeprom_temp[1] = ((unsigned)eeprom_address>>8) & 0xFF; //addr High eeprom_temp[1] = ((unsigned)eeprom_address>>8) & 0xFF; //addr High
eeprom_temp[2] = (unsigned)eeprom_address & 0xFF; //addr Low eeprom_temp[2] = (unsigned)eeprom_address & 0xFF; //addr Low
digitalWrite(SPI_EEPROM1_CS, LOW); WRITE(SPI_EEPROM1_CS, LOW);
spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 3); spiSend(SPI_CHAN_EEPROM1, eeprom_temp, 3);
spiSend(SPI_CHAN_EEPROM1, (const uint8_t*)src, n); spiSend(SPI_CHAN_EEPROM1, (const uint8_t*)src, n);
digitalWrite(SPI_EEPROM1_CS, HIGH); WRITE(SPI_EEPROM1_CS, HIGH);
delay(7); // wait for page write to complete delay(7); // wait for page write to complete
} }