BTT SKR 1.3 pins for Anet Full Graphics LCD (#16047)

This commit is contained in:
hammerhead2k2 2019-11-30 15:21:54 +01:00 committed by Scott Lahteine
parent 83a4e8559c
commit 19f840a9b5

View file

@ -179,22 +179,59 @@
* EXP2 EXP1 * EXP2 EXP1
*/ */
#if HAS_SPI_LCD #if HAS_SPI_LCD
#define BTN_ENC P0_28 // (58) open-drain
#if ENABLED(CR10_STOCKDISPLAY) #if ENABLED(ANET_FULL_GRAPHICS_LCD)
#error "CAUTION! ANET_FULL_GRAPHICS_LCD requires wiring modifications. See 'pins_BTT_SKR_V1_3.h' for details. Comment out this line to continue."
/**
* 1. Cut the tab off the LCD connector so it can be plugged into the "EXP1" connector the other way.
* 2. Swap the LCD's +5V (Pin2) and GND (Pin1) wires. (This is the critical part!)
* 3. Rewire the CLK Signal (LCD Pin9) to LCD Pin7. (LCD Pin9 remains open because this pin is open drain.)
* 4. A wire is needed to connect the Reset switch at J3 (LCD Pin7) to EXP2 (Pin3) on the board.
*
* !!! If you are unsure, ask for help! Your motherboard may be damaged in some circumstances !!!
*
* The ANET_FULL_GRAPHICS_LCD connector plug:
*
* BEFORE AFTER
* _____ _____
* GND 1 | · · | 2 5V 5V 1 | · · | 2 GND
* CS 3 | · · | 4 BTN_EN2 CS 3 | · · | 4 BTN_EN2
* SID 5 | · · | 6 BTN_EN1 SID 5 | · · | 6 BTN_EN1
* open 7 | · · | 8 BTN_ENC CLK 7 | · · | 8 BTN_ENC
* CLK 9 | · · | 10 Beeper open 9 | · · | 10 Beeper
* ----- -----
* LCD LCD
*/
#define LCD_PINS_RS P1_23
#define BTN_EN1 P1_20
#define BTN_EN2 P1_22
#define BTN_ENC P1_18
#define LCD_PINS_ENABLE P1_21
#define LCD_PINS_D4 P1_19
#elif ENABLED(CR10_STOCKDISPLAY)
#define LCD_PINS_RS P1_22 #define LCD_PINS_RS P1_22
#define BTN_EN1 P1_18 #define BTN_EN1 P1_18
#define BTN_EN2 P1_20 #define BTN_EN2 P1_20
#define BTN_ENC P0_28 // (58) open-drain
#define LCD_PINS_ENABLE P1_23 #define LCD_PINS_ENABLE P1_23
#define LCD_PINS_D4 P1_21 #define LCD_PINS_D4 P1_21
#else #else // !CR10_STOCKDISPLAY
#define LCD_PINS_RS P1_19 #define LCD_PINS_RS P1_19
#define BTN_EN1 P3_26 // (31) J3-2 & AUX-4 #define BTN_EN1 P3_26 // (31) J3-2 & AUX-4
#define BTN_EN2 P3_25 // (33) J3-4 & AUX-4 #define BTN_EN2 P3_25 // (33) J3-4 & AUX-4
#define BTN_ENC P0_28 // (58) open-drain
#define LCD_PINS_ENABLE P1_18 #define LCD_PINS_ENABLE P1_18
#define LCD_PINS_D4 P1_20 #define LCD_PINS_D4 P1_20
@ -247,7 +284,7 @@
#endif // !FYSETC_MINI_12864 #endif // !FYSETC_MINI_12864
#endif #endif // !CR10_STOCKDISPLAY
#endif // HAS_SPI_LCD #endif // HAS_SPI_LCD