HAL whitespace and style cleanup

This commit is contained in:
Scott Lahteine 2017-09-27 04:57:33 -05:00
parent c272f2c84e
commit c2b1d51f16
24 changed files with 449 additions and 829 deletions

View file

@ -4,7 +4,7 @@
Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
This program is free software: you can redistribute it and/or modify This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or the Free Software Foundation, either version 3 of the License, or

View file

@ -83,7 +83,7 @@
//void cli(void); //void cli(void);
//void _delay_ms(int delay); //void _delay_ms(const int delay);
inline void HAL_clear_reset_source(void) { MCUSR = 0; } inline void HAL_clear_reset_source(void) { MCUSR = 0; }
inline uint8_t HAL_get_reset_source(void) { return MCUSR; } inline uint8_t HAL_get_reset_source(void) { return MCUSR; }

View file

@ -24,7 +24,7 @@
* Originally from Arduino Sd2Card Library * Originally from Arduino Sd2Card Library
* Copyright (C) 2009 by William Greiman * Copyright (C) 2009 by William Greiman
*/ */
/** /**
* Description: HAL for AVR - SPI functions * Description: HAL for AVR - SPI functions
* *

View file

@ -393,7 +393,7 @@ static void pwm_details(uint8_t pin) {
SERIAL_PROTOCOL_SP(10); SERIAL_PROTOCOL_SP(10);
#endif #endif
} }
#define PRINT_PORT(p) print_port(p) #define PRINT_PORT(p) print_port(p)
#endif #endif

View file

@ -1,9 +1,9 @@
/* ************************************************************************** /* **************************************************************************
Marlin 3D Printer Firmware Marlin 3D Printer Firmware
Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
This program is free software: you can redistribute it and/or modify This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or the Free Software Foundation, either version 3 of the License, or
@ -93,7 +93,7 @@ uint8_t HAL_get_reset_source (void) {
} }
} }
void _delay_ms(int delay_ms) { void _delay_ms(const int delay_ms) {
// todo: port for Due? // todo: port for Due?
delay(delay_ms); delay(delay_ms);
} }

View file

@ -120,7 +120,7 @@ void HAL_clear_reset_source (void);
/** reset reason */ /** reset reason */
uint8_t HAL_get_reset_source (void); uint8_t HAL_get_reset_source (void);
void _delay_ms(int delay); void _delay_ms(const int delay);
int freeMemory(void); int freeMemory(void);

View file

@ -199,11 +199,11 @@
if(spiRate > 6) spiRate = 1; if(spiRate > 6) spiRate = 1;
#if MB(ALLIGATOR) #if MB(ALLIGATOR)
// Set SPI mode 1, clock, select not active after transfer, with delay between transfers // Set SPI mode 1, clock, select not active after transfer, with delay between transfers
SPI_ConfigureNPCS(SPI0, SPI_CHAN_DAC, SPI_ConfigureNPCS(SPI0, SPI_CHAN_DAC,
SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) | SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
SPI_CSR_DLYBCT(1)); SPI_CSR_DLYBCT(1));
// Set SPI mode 0, clock, select not active after transfer, with delay between transfers // Set SPI mode 0, clock, select not active after transfer, with delay between transfers
SPI_ConfigureNPCS(SPI0, SPI_CHAN_EEPROM1, SPI_CSR_NCPHA | SPI_ConfigureNPCS(SPI0, SPI_CHAN_EEPROM1, SPI_CSR_NCPHA |
SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) | SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
SPI_CSR_DLYBCT(1)); SPI_CSR_DLYBCT(1));

View file

@ -21,7 +21,7 @@
*/ */
#ifdef ARDUINO_ARCH_SAM #ifdef ARDUINO_ARCH_SAM
#include "../../inc/MarlinConfig.h" #include "../../inc/MarlinConfig.h"
#if ENABLED(USE_WATCHDOG) #if ENABLED(USE_WATCHDOG)

View file

@ -35,606 +35,301 @@ volatile uint32_t UART0RxQueueWritePos = 0, UART1RxQueueWritePos = 0, UART2RxQue
volatile uint32_t UART0RxQueueReadPos = 0, UART1RxQueueReadPos = 0, UART2RxQueueReadPos = 0, UART3RxQueueReadPos = 0; volatile uint32_t UART0RxQueueReadPos = 0, UART1RxQueueReadPos = 0, UART2RxQueueReadPos = 0, UART3RxQueueReadPos = 0;
volatile uint8_t dummy; volatile uint8_t dummy;
void HardwareSerial::begin(uint32_t baudrate) { void HardwareSerial::begin(uint32_t baudrate) {
uint32_t Fdiv; uint32_t Fdiv, pclkdiv, pclk;
uint32_t pclkdiv, pclk;
if ( PortNum == 0 ) if (PortNum == 0) {
{ LPC_PINCON->PINSEL0 &= ~0x000000F0;
LPC_PINCON->PINSEL0 &= ~0x000000F0; LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2 */
LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2 */ /* By default, the PCLKSELx value is zero, thus, the PCLK for
/* By default, the PCLKSELx value is zero, thus, the PCLK for all the peripherals is 1/4 of the SystemFrequency. */
all the peripherals is 1/4 of the SystemFrequency. */ /* Bit 6~7 is for UART0 */
/* Bit 6~7 is for UART0 */ pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03;
pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; switch (pclkdiv) {
switch ( pclkdiv ) case 0x00:
{ default:
case 0x00: pclk = SystemCoreClock / 4;
default: break;
pclk = SystemCoreClock/4; case 0x01:
break; pclk = SystemCoreClock;
case 0x01: break;
pclk = SystemCoreClock; case 0x02:
break; pclk = SystemCoreClock / 2;
case 0x02: break;
pclk = SystemCoreClock/2; case 0x03:
break; pclk = SystemCoreClock / 8;
case 0x03: break;
pclk = SystemCoreClock/8;
break;
}
LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = ( pclk / 16 ) / baudrate ; /*baud rate */
LPC_UART0->DLM = Fdiv / 256;
LPC_UART0->DLL = Fdiv % 256;
LPC_UART0->LCR = 0x03; /* DLAB = 0 */
LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
NVIC_EnableIRQ(UART0_IRQn);
LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART0 interrupt */
}
else if ( PortNum == 1 )
{
LPC_PINCON->PINSEL4 &= ~0x0000000F;
LPC_PINCON->PINSEL4 |= 0x0000000A; /* Enable RxD1 P2.1, TxD1 P2.0 */
/* By default, the PCLKSELx value is zero, thus, the PCLK for
all the peripherals is 1/4 of the SystemFrequency. */
/* Bit 8,9 are for UART1 */
pclkdiv = (LPC_SC->PCLKSEL0 >> 8) & 0x03;
switch ( pclkdiv )
{
case 0x00:
default:
pclk = SystemCoreClock/4;
break;
case 0x01:
pclk = SystemCoreClock;
break;
case 0x02:
pclk = SystemCoreClock/2;
break;
case 0x03:
pclk = SystemCoreClock/8;
break;
}
LPC_UART1->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = ( pclk / 16 ) / baudrate ; /*baud rate */
LPC_UART1->DLM = Fdiv / 256;
LPC_UART1->DLL = Fdiv % 256;
LPC_UART1->LCR = 0x03; /* DLAB = 0 */
LPC_UART1->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
NVIC_EnableIRQ(UART1_IRQn);
LPC_UART1->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART1 interrupt */
}
else if ( PortNum == 2 )
{
//LPC_PINCON->PINSEL4 &= ~0x000F0000; /*Pinsel4 Bits 16-19*/
//LPC_PINCON->PINSEL4 |= 0x000A0000; /* RxD2 is P2.9 and TxD2 is P2.8, value 10*/
LPC_PINCON->PINSEL0 &= ~0x00F00000; /*Pinsel0 Bits 20-23*/
LPC_PINCON->PINSEL0 |= 0x00500000; /* RxD2 is P0.11 and TxD2 is P0.10, value 01*/
LPC_SC->PCONP |= 1<<24; //Enable PCUART2
/* By default, the PCLKSELx value is zero, thus, the PCLK for
all the peripherals is 1/4 of the SystemFrequency. */
/* Bit 6~7 is for UART3 */
pclkdiv = (LPC_SC->PCLKSEL1 >> 16) & 0x03;
switch ( pclkdiv )
{
case 0x00:
default:
pclk = SystemCoreClock/4;
break;
case 0x01:
pclk = SystemCoreClock;
break;
case 0x02:
pclk = SystemCoreClock/2;
break;
case 0x03:
pclk = SystemCoreClock/8;
break;
}
LPC_UART2->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = ( pclk / 16 ) / baudrate ; /*baud rate */
LPC_UART2->DLM = Fdiv / 256;
LPC_UART2->DLL = Fdiv % 256;
LPC_UART2->LCR = 0x03; /* DLAB = 0 */
LPC_UART2->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
NVIC_EnableIRQ(UART2_IRQn);
LPC_UART2->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART3 interrupt */
}
else if ( PortNum == 3 )
{
LPC_PINCON->PINSEL0 &= ~0x0000000F;
LPC_PINCON->PINSEL0 |= 0x0000000A; /* RxD3 is P0.1 and TxD3 is P0.0 */
LPC_SC->PCONP |= 1<<4 | 1<<25; //Enable PCUART1
/* By default, the PCLKSELx value is zero, thus, the PCLK for
all the peripherals is 1/4 of the SystemFrequency. */
/* Bit 6~7 is for UART3 */
pclkdiv = (LPC_SC->PCLKSEL1 >> 18) & 0x03;
switch ( pclkdiv )
{
case 0x00:
default:
pclk = SystemCoreClock/4;
break;
case 0x01:
pclk = SystemCoreClock;
break;
case 0x02:
pclk = SystemCoreClock/2;
break;
case 0x03:
pclk = SystemCoreClock/8;
break;
}
LPC_UART3->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = ( pclk / 16 ) / baudrate ; /*baud rate */
LPC_UART3->DLM = Fdiv / 256;
LPC_UART3->DLL = Fdiv % 256;
LPC_UART3->LCR = 0x03; /* DLAB = 0 */
LPC_UART3->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
NVIC_EnableIRQ(UART3_IRQn);
LPC_UART3->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART3 interrupt */
}
}
int HardwareSerial::read() {
uint8_t rx;
if ( PortNum == 0 )
{
if (UART0RxQueueReadPos == UART0RxQueueWritePos)
return -1;
// Read from "head"
rx = UART0Buffer[UART0RxQueueReadPos]; // grab next byte
UART0RxQueueReadPos = (UART0RxQueueReadPos + 1) % UARTRXQUEUESIZE;
return rx;
}
if ( PortNum == 1 )
{
if (UART1RxQueueReadPos == UART1RxQueueWritePos)
return -1;
// Read from "head"
rx = UART1Buffer[UART1RxQueueReadPos]; // grab next byte
UART1RxQueueReadPos = (UART1RxQueueReadPos + 1) % UARTRXQUEUESIZE;
return rx;
}
if ( PortNum == 2 )
{
if (UART2RxQueueReadPos == UART2RxQueueWritePos)
return -1;
// Read from "head"
rx = UART2Buffer[UART2RxQueueReadPos]; // grab next byte
UART2RxQueueReadPos = (UART2RxQueueReadPos + 1) % UARTRXQUEUESIZE;
return rx;
}
if ( PortNum == 3 )
{
if (UART3RxQueueReadPos == UART3RxQueueWritePos)
return -1;
// Read from "head"
rx = UART3Buffer[UART3RxQueueReadPos]; // grab next byte
UART3RxQueueReadPos = (UART3RxQueueReadPos + 1) % UARTRXQUEUESIZE;
return rx;
}
return 0;
}
size_t HardwareSerial::write(uint8_t send) {
if ( PortNum == 0 )
{
/* THRE status, contain valid data */
while ( !(UART0TxEmpty & 0x01) );
LPC_UART0->THR = send;
UART0TxEmpty = 0; /* not empty in the THR until it shifts out */
}
else if (PortNum == 1)
{
/* THRE status, contain valid data */
while ( !(UART1TxEmpty & 0x01) );
LPC_UART1->THR = send;
UART1TxEmpty = 0; /* not empty in the THR until it shifts out */
}
else if ( PortNum == 2 )
{
/* THRE status, contain valid data */
while ( !(UART2TxEmpty & 0x01) );
LPC_UART2->THR = send;
UART2TxEmpty = 0; /* not empty in the THR until it shifts out */
}
else if ( PortNum == 3 )
{
/* THRE status, contain valid data */
while ( !(UART3TxEmpty & 0x01) );
LPC_UART3->THR = send;
UART3TxEmpty = 0; /* not empty in the THR until it shifts out */
}
return 0;
}
int HardwareSerial::available() {
if ( PortNum == 0 )
{
return (UART0RxQueueWritePos + UARTRXQUEUESIZE - UART0RxQueueReadPos) % UARTRXQUEUESIZE;
}
if ( PortNum == 1 )
{
return (UART1RxQueueWritePos + UARTRXQUEUESIZE - UART1RxQueueReadPos) % UARTRXQUEUESIZE;
}
if ( PortNum == 2 )
{
return (UART2RxQueueWritePos + UARTRXQUEUESIZE - UART2RxQueueReadPos) % UARTRXQUEUESIZE;
}
if ( PortNum == 3 )
{
return (UART3RxQueueWritePos + UARTRXQUEUESIZE - UART3RxQueueReadPos) % UARTRXQUEUESIZE;
}
return 0;
}
void HardwareSerial::flush() {
if ( PortNum == 0 )
{
UART0RxQueueWritePos = 0;
UART0RxQueueReadPos = 0;
}
if ( PortNum == 1 )
{
UART1RxQueueWritePos = 0;
UART1RxQueueReadPos = 0;
}
if ( PortNum == 2 )
{
UART2RxQueueWritePos = 0;
UART2RxQueueReadPos = 0;
}
if ( PortNum == 3 )
{
UART3RxQueueWritePos = 0;
UART3RxQueueReadPos = 0;
}
return;
}
void HardwareSerial::printf(const char *format, ...) {
static char buffer[256];
va_list vArgs;
va_start(vArgs, format);
int length = vsnprintf((char *) buffer, 256, (char const *) format, vArgs);
va_end(vArgs);
if (length > 0 && length < 256) {
for (int i = 0; i < length;) {
write(buffer[i]);
++i;
}
}
} }
LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = ( pclk / 16 ) / baudrate ; /*baud rate */
LPC_UART0->DLM = Fdiv / 256;
LPC_UART0->DLL = Fdiv % 256;
LPC_UART0->LCR = 0x03; /* DLAB = 0 */
LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
NVIC_EnableIRQ(UART0_IRQn);
LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART0 interrupt */
}
else if (PortNum == 1) {
LPC_PINCON->PINSEL4 &= ~0x0000000F;
LPC_PINCON->PINSEL4 |= 0x0000000A; /* Enable RxD1 P2.1, TxD1 P2.0 */
/* By default, the PCLKSELx value is zero, thus, the PCLK for
all the peripherals is 1/4 of the SystemFrequency. */
/* Bit 8,9 are for UART1 */
pclkdiv = (LPC_SC->PCLKSEL0 >> 8) & 0x03;
switch (pclkdiv) {
case 0x00:
default:
pclk = SystemCoreClock / 4;
break;
case 0x01:
pclk = SystemCoreClock;
break;
case 0x02:
pclk = SystemCoreClock / 2;
break;
case 0x03:
pclk = SystemCoreClock / 8;
break;
}
LPC_UART1->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = ( pclk / 16 ) / baudrate ; /*baud rate */
LPC_UART1->DLM = Fdiv / 256;
LPC_UART1->DLL = Fdiv % 256;
LPC_UART1->LCR = 0x03; /* DLAB = 0 */
LPC_UART1->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
NVIC_EnableIRQ(UART1_IRQn);
LPC_UART1->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART1 interrupt */
}
else if (PortNum == 2) {
//LPC_PINCON->PINSEL4 &= ~0x000F0000; /*Pinsel4 Bits 16-19*/
//LPC_PINCON->PINSEL4 |= 0x000A0000; /* RxD2 is P2.9 and TxD2 is P2.8, value 10*/
LPC_PINCON->PINSEL0 &= ~0x00F00000; /*Pinsel0 Bits 20-23*/
LPC_PINCON->PINSEL0 |= 0x00500000; /* RxD2 is P0.11 and TxD2 is P0.10, value 01*/
LPC_SC->PCONP |= 1 << 24; //Enable PCUART2
/* By default, the PCLKSELx value is zero, thus, the PCLK for
all the peripherals is 1/4 of the SystemFrequency. */
/* Bit 6~7 is for UART3 */
pclkdiv = (LPC_SC->PCLKSEL1 >> 16) & 0x03;
switch (pclkdiv) {
case 0x00:
default:
pclk = SystemCoreClock / 4;
break;
case 0x01:
pclk = SystemCoreClock;
break;
case 0x02:
pclk = SystemCoreClock / 2;
break;
case 0x03:
pclk = SystemCoreClock / 8;
break;
}
LPC_UART2->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = (pclk / 16) / baudrate; /*baud rate */
LPC_UART2->DLM = Fdiv >> 8;
LPC_UART2->DLL = Fdiv & 0xFF;
LPC_UART2->LCR = 0x03; /* DLAB = 0 */
LPC_UART2->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
NVIC_EnableIRQ(UART2_IRQn);
LPC_UART2->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART3 interrupt */
}
else if (PortNum == 3) {
LPC_PINCON->PINSEL0 &= ~0x0000000F;
LPC_PINCON->PINSEL0 |= 0x0000000A; /* RxD3 is P0.1 and TxD3 is P0.0 */
LPC_SC->PCONP |= 1 << 4 | 1 << 25; //Enable PCUART1
/* By default, the PCLKSELx value is zero, thus, the PCLK for
all the peripherals is 1/4 of the SystemFrequency. */
/* Bit 6~7 is for UART3 */
pclkdiv = (LPC_SC->PCLKSEL1 >> 18) & 0x03;
switch (pclkdiv) {
case 0x00:
default:
pclk = SystemCoreClock / 4;
break;
case 0x01:
pclk = SystemCoreClock;
break;
case 0x02:
pclk = SystemCoreClock / 2;
break;
case 0x03:
pclk = SystemCoreClock / 8;
break;
}
LPC_UART3->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = (pclk / 16) / baudrate ; /*baud rate */
LPC_UART3->DLM = Fdiv >> 8;
LPC_UART3->DLL = Fdiv & 0xFF;
LPC_UART3->LCR = 0x03; /* DLAB = 0 */
LPC_UART3->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
NVIC_EnableIRQ(UART3_IRQn);
LPC_UART3->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART3 interrupt */
}
}
int HardwareSerial::read() {
uint8_t rx;
if (PortNum == 0) {
if (UART0RxQueueReadPos == UART0RxQueueWritePos) return -1;
// Read from "head"
rx = UART0Buffer[UART0RxQueueReadPos]; // grab next byte
UART0RxQueueReadPos = (UART0RxQueueReadPos + 1) % UARTRXQUEUESIZE;
return rx;
}
if (PortNum == 1) {
if (UART1RxQueueReadPos == UART1RxQueueWritePos) return -1;
rx = UART1Buffer[UART1RxQueueReadPos];
UART1RxQueueReadPos = (UART1RxQueueReadPos + 1) % UARTRXQUEUESIZE;
return rx;
}
if (PortNum == 2) {
if (UART2RxQueueReadPos == UART2RxQueueWritePos) return -1;
rx = UART2Buffer[UART2RxQueueReadPos];
UART2RxQueueReadPos = (UART2RxQueueReadPos + 1) % UARTRXQUEUESIZE;
return rx;
}
if (PortNum == 3) {
if (UART3RxQueueReadPos == UART3RxQueueWritePos) return -1;
rx = UART3Buffer[UART3RxQueueReadPos];
UART3RxQueueReadPos = (UART3RxQueueReadPos + 1) % UARTRXQUEUESIZE;
return rx;
}
return 0;
}
size_t HardwareSerial::write(uint8_t send) {
if (PortNum == 0) {
/* THRE status, contain valid data */
while (!(UART0TxEmpty & 0x01));
LPC_UART0->THR = send;
UART0TxEmpty = 0; /* not empty in the THR until it shifts out */
}
else if (PortNum == 1) {
while (!(UART1TxEmpty & 0x01));
LPC_UART1->THR = send;
UART1TxEmpty = 0;
}
else if (PortNum == 2) {
while (!(UART2TxEmpty & 0x01));
LPC_UART2->THR = send;
UART2TxEmpty = 0;
}
else if (PortNum == 3) {
while (!(UART3TxEmpty & 0x01));
LPC_UART3->THR = send;
UART3TxEmpty = 0;
}
return 0;
}
int HardwareSerial::available() {
if (PortNum == 0)
return (UART0RxQueueWritePos + UARTRXQUEUESIZE - UART0RxQueueReadPos) % UARTRXQUEUESIZE;
if (PortNum == 1)
return (UART1RxQueueWritePos + UARTRXQUEUESIZE - UART1RxQueueReadPos) % UARTRXQUEUESIZE;
if (PortNum == 2)
return (UART2RxQueueWritePos + UARTRXQUEUESIZE - UART2RxQueueReadPos) % UARTRXQUEUESIZE;
if (PortNum == 3)
return (UART3RxQueueWritePos + UARTRXQUEUESIZE - UART3RxQueueReadPos) % UARTRXQUEUESIZE;
return 0;
}
void HardwareSerial::flush() {
if (PortNum == 0)
UART0RxQueueWritePos = UART0RxQueueReadPos = 0;
if (PortNum == 1)
UART1RxQueueWritePos = UART1RxQueueReadPos = 0;
if (PortNum == 2)
UART2RxQueueWritePos = UART2RxQueueReadPos = 0;
if (PortNum == 3)
UART3RxQueueWritePos = UART3RxQueueReadPos = 0;
}
void HardwareSerial::printf(const char *format, ...) {
static char buffer[256];
va_list vArgs;
va_start(vArgs, format);
int length = vsnprintf((char *) buffer, 256, (char const *) format, vArgs);
va_end(vArgs);
if (length > 0 && length < 256)
for (int i = 0; i < length; ++i)
write(buffer[i]);
}
/*****************************************************************************
** Function name: UARTn_IRQHandler
**
** Descriptions: UARTn interrupt handler
**
** parameters: None
** Returned value: None
**
*****************************************************************************/
#define DEFINE_UART_HANDLER(NUM) \
void UART3_IRQHandler(void) { \
uint8_t IIRValue, LSRValue; \
uint8_t Dummy = Dummy; \
IIRValue = LPC_UART ##NUM## ->IIR; \
IIRValue >>= 1; \
IIRValue &= 0x07; \
switch (IIRValue) { \
case IIR_RLS: \
LSRValue = LPC_UART ##NUM## ->LSR; \
if (LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI)) { \
UART ##NUM## Status = LSRValue; \
Dummy = LPC_UART ##NUM## ->RBR; \
return; \
} \
if (LSRValue & LSR_RDR) { \
if ((UART ##NUM## RxQueueWritePos+1) % UARTRXQUEUESIZE != UART ##NUM## RxQueueReadPos) { \
UART ##NUM## Buffer[UART ##NUM## RxQueueWritePos] = LPC_UART ##NUM## ->RBR; \
UART ##NUM## RxQueueWritePos = (UART ##NUM## RxQueueWritePos+1) % UARTRXQUEUESIZE; \
} \
} \
break; \
case IIR_RDA: \
if ((UART ##NUM## RxQueueWritePos+1) % UARTRXQUEUESIZE != UART ##NUM## RxQueueReadPos) { \
UART ##NUM## Buffer[UART ##NUM## RxQueueWritePos] = LPC_UART ##NUM## ->RBR; \
UART ##NUM## RxQueueWritePos = (UART ##NUM## RxQueueWritePos+1) % UARTRXQUEUESIZE; \
} \
else \
dummy = LPC_UART ##NUM## ->RBR;; \
break; \
case IIR_CTI: \
UART ##NUM## Status |= 0x100; \
break; \
case IIR_THRE: \
LSRValue = LPC_UART ##NUM## ->LSR; \
UART ##NUM## TxEmpty = (LSRValue & LSR_THRE) ? 1 : 0; \
break; \
} \
} \
typedef void _uart_ ## NUM
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/***************************************************************************** DEFINE_UART_HANDLER(0);
** Function name: UART0_IRQHandler DEFINE_UART_HANDLER(1);
** DEFINE_UART_HANDLER(2);
** Descriptions: UART0 interrupt handler DEFINE_UART_HANDLER(3);
**
** parameters: None
** Returned value: None
**
*****************************************************************************/
void UART0_IRQHandler (void)
{
uint8_t IIRValue, LSRValue;
uint8_t Dummy = Dummy;
IIRValue = LPC_UART0->IIR;
IIRValue >>= 1; /* skip pending bit in IIR */
IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
if ( IIRValue == IIR_RLS ) /* Receive Line Status */
{
LSRValue = LPC_UART0->LSR;
/* Receive Line Status */
if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) )
{
/* There are errors or break interrupt */
/* Read LSR will clear the interrupt */
UART0Status = LSRValue;
Dummy = LPC_UART0->RBR; /* Dummy read on RX to clear
interrupt, then bail out */
return;
}
if ( LSRValue & LSR_RDR ) /* Receive Data Ready */
{
/* If no error on RLS, normal ready, save into the data buffer. */
/* Note: read RBR will clear the interrupt */
if ((UART0RxQueueWritePos+1) % UARTRXQUEUESIZE != UART0RxQueueReadPos)
{
UART0Buffer[UART0RxQueueWritePos] = LPC_UART0->RBR;
UART0RxQueueWritePos = (UART0RxQueueWritePos+1) % UARTRXQUEUESIZE;
}
else
dummy = LPC_UART0->RBR;;
}
}
else if ( IIRValue == IIR_RDA ) /* Receive Data Available */
{
/* Receive Data Available */
if ((UART0RxQueueWritePos+1) % UARTRXQUEUESIZE != UART0RxQueueReadPos)
{
UART0Buffer[UART0RxQueueWritePos] = LPC_UART0->RBR;
UART0RxQueueWritePos = (UART0RxQueueWritePos+1) % UARTRXQUEUESIZE;
}
else
dummy = LPC_UART1->RBR;;
}
else if ( IIRValue == IIR_CTI ) /* Character timeout indicator */
{
/* Character Time-out indicator */
UART0Status |= 0x100; /* Bit 9 as the CTI error */
}
else if ( IIRValue == IIR_THRE ) /* THRE, transmit holding register empty */
{
/* THRE interrupt */
LSRValue = LPC_UART0->LSR; /* Check status in the LSR to see if
valid data in U0THR or not */
if ( LSRValue & LSR_THRE )
{
UART0TxEmpty = 1;
}
else
{
UART0TxEmpty = 0;
}
}
}
/*****************************************************************************
** Function name: UART1_IRQHandler
**
** Descriptions: UART1 interrupt handler
**
** parameters: None
** Returned value: None
**
*****************************************************************************/
void UART1_IRQHandler (void)
{
uint8_t IIRValue, LSRValue;
uint8_t Dummy = Dummy;
IIRValue = LPC_UART1->IIR;
IIRValue >>= 1; /* skip pending bit in IIR */
IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
if ( IIRValue == IIR_RLS ) /* Receive Line Status */
{
LSRValue = LPC_UART1->LSR;
/* Receive Line Status */
if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) )
{
/* There are errors or break interrupt */
/* Read LSR will clear the interrupt */
UART1Status = LSRValue;
Dummy = LPC_UART1->RBR; /* Dummy read on RX to clear
interrupt, then bail out */
return;
}
if ( LSRValue & LSR_RDR ) /* Receive Data Ready */
{
/* If no error on RLS, normal ready, save into the data buffer. */
/* Note: read RBR will clear the interrupt */
if ((UART1RxQueueWritePos+1) % UARTRXQUEUESIZE != UART1RxQueueReadPos)
{
UART1Buffer[UART1RxQueueWritePos] = LPC_UART1->RBR;
UART1RxQueueWritePos =(UART1RxQueueWritePos+1) % UARTRXQUEUESIZE;
}
else
dummy = LPC_UART1->RBR;;
}
}
else if ( IIRValue == IIR_RDA ) /* Receive Data Available */
{
/* Receive Data Available */
if ((UART1RxQueueWritePos+1) % UARTRXQUEUESIZE != UART1RxQueueReadPos)
{
UART1Buffer[UART1RxQueueWritePos] = LPC_UART1->RBR;
UART1RxQueueWritePos = (UART1RxQueueWritePos+1) % UARTRXQUEUESIZE;
}
else
dummy = LPC_UART1->RBR;;
}
else if ( IIRValue == IIR_CTI ) /* Character timeout indicator */
{
/* Character Time-out indicator */
UART1Status |= 0x100; /* Bit 9 as the CTI error */
}
else if ( IIRValue == IIR_THRE ) /* THRE, transmit holding register empty */
{
/* THRE interrupt */
LSRValue = LPC_UART1->LSR; /* Check status in the LSR to see if
valid data in U0THR or not */
if ( LSRValue & LSR_THRE )
{
UART1TxEmpty = 1;
}
else
{
UART1TxEmpty = 0;
}
}
}
/*****************************************************************************
** Function name: UART2_IRQHandler
**
** Descriptions: UART2 interrupt handler
**
** parameters: None
** Returned value: None
**
*****************************************************************************/
void UART2_IRQHandler (void)
{
uint8_t IIRValue, LSRValue;
uint8_t Dummy = Dummy;
IIRValue = LPC_UART2->IIR;
IIRValue >>= 1; /* skip pending bit in IIR */
IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
if ( IIRValue == IIR_RLS ) /* Receive Line Status */
{
LSRValue = LPC_UART2->LSR;
/* Receive Line Status */
if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) )
{
/* There are errors or break interrupt */
/* Read LSR will clear the interrupt */
UART2Status = LSRValue;
Dummy = LPC_UART2->RBR; /* Dummy read on RX to clear
interrupt, then bail out */
return;
}
if ( LSRValue & LSR_RDR ) /* Receive Data Ready */
{
/* If no error on RLS, normal ready, save into the data buffer. */
/* Note: read RBR will clear the interrupt */
if ((UART2RxQueueWritePos+1) % UARTRXQUEUESIZE != UART2RxQueueReadPos)
{
UART2Buffer[UART2RxQueueWritePos] = LPC_UART2->RBR;
UART2RxQueueWritePos = (UART2RxQueueWritePos+1) % UARTRXQUEUESIZE;
}
}
}
else if ( IIRValue == IIR_RDA ) /* Receive Data Available */
{
/* Receive Data Available */
if ((UART2RxQueueWritePos+1) % UARTRXQUEUESIZE != UART2RxQueueReadPos)
{
UART2Buffer[UART2RxQueueWritePos] = LPC_UART2->RBR;
UART2RxQueueWritePos = (UART2RxQueueWritePos+1) % UARTRXQUEUESIZE;
}
else
dummy = LPC_UART2->RBR;;
}
else if ( IIRValue == IIR_CTI ) /* Character timeout indicator */
{
/* Character Time-out indicator */
UART2Status |= 0x100; /* Bit 9 as the CTI error */
}
else if ( IIRValue == IIR_THRE ) /* THRE, transmit holding register empty */
{
/* THRE interrupt */
LSRValue = LPC_UART2->LSR; /* Check status in the LSR to see if
valid data in U0THR or not */
if ( LSRValue & LSR_THRE )
{
UART2TxEmpty = 1;
}
else
{
UART2TxEmpty = 0;
}
}
}
/*****************************************************************************
** Function name: UART3_IRQHandler
**
** Descriptions: UART0 interrupt handler
**
** parameters: None
** Returned value: None
**
*****************************************************************************/
void UART3_IRQHandler (void)
{
uint8_t IIRValue, LSRValue;
uint8_t Dummy = Dummy;
IIRValue = LPC_UART3->IIR;
IIRValue >>= 1; /* skip pending bit in IIR */
IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
if ( IIRValue == IIR_RLS ) /* Receive Line Status */
{
LSRValue = LPC_UART3->LSR;
/* Receive Line Status */
if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) )
{
/* There are errors or break interrupt */
/* Read LSR will clear the interrupt */
UART3Status = LSRValue;
Dummy = LPC_UART3->RBR; /* Dummy read on RX to clear
interrupt, then bail out */
return;
}
if ( LSRValue & LSR_RDR ) /* Receive Data Ready */
{
/* If no error on RLS, normal ready, save into the data buffer. */
/* Note: read RBR will clear the interrupt */
if ((UART3RxQueueWritePos+1) % UARTRXQUEUESIZE != UART3RxQueueReadPos)
{
UART3Buffer[UART3RxQueueWritePos] = LPC_UART3->RBR;
UART3RxQueueWritePos = (UART3RxQueueWritePos+1) % UARTRXQUEUESIZE;
}
}
}
else if ( IIRValue == IIR_RDA ) /* Receive Data Available */
{
/* Receive Data Available */
if ((UART3RxQueueWritePos+1) % UARTRXQUEUESIZE != UART3RxQueueReadPos)
{
UART3Buffer[UART3RxQueueWritePos] = LPC_UART3->RBR;
UART3RxQueueWritePos = (UART3RxQueueWritePos+1) % UARTRXQUEUESIZE;
}
else
dummy = LPC_UART3->RBR;;
}
else if ( IIRValue == IIR_CTI ) /* Character timeout indicator */
{
/* Character Time-out indicator */
UART3Status |= 0x100; /* Bit 9 as the CTI error */
}
else if ( IIRValue == IIR_THRE ) /* THRE, transmit holding register empty */
{
/* THRE interrupt */
LSRValue = LPC_UART3->LSR; /* Check status in the LSR to see if
valid data in U0THR or not */
if ( LSRValue & LSR_THRE )
{
UART3TxEmpty = 1;
}
else
{
UART3TxEmpty = 0;
}
}
}
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif // TARGET_LPC1768 #endif // TARGET_LPC1768

View file

@ -29,30 +29,29 @@
extern "C" { extern "C" {
#include <debug_frmwrk.h> #include <debug_frmwrk.h>
//#include <lpc17xx_uart.h>
//#include <lpc17xx_uart.h>
} }
#define IER_RBR 0x01 #define IER_RBR 0x01
#define IER_THRE 0x02 #define IER_THRE 0x02
#define IER_RLS 0x04 #define IER_RLS 0x04
#define IIR_PEND 0x01 #define IIR_PEND 0x01
#define IIR_RLS 0x03 #define IIR_RLS 0x03
#define IIR_RDA 0x02 #define IIR_RDA 0x02
#define IIR_CTI 0x06 #define IIR_CTI 0x06
#define IIR_THRE 0x01 #define IIR_THRE 0x01
#define LSR_RDR 0x01 #define LSR_RDR 0x01
#define LSR_OE 0x02 #define LSR_OE 0x02
#define LSR_PE 0x04 #define LSR_PE 0x04
#define LSR_FE 0x08 #define LSR_FE 0x08
#define LSR_BI 0x10 #define LSR_BI 0x10
#define LSR_THRE 0x20 #define LSR_THRE 0x20
#define LSR_TEMT 0x40 #define LSR_TEMT 0x40
#define LSR_RXFE 0x80 #define LSR_RXFE 0x80
#define UARTRXQUEUESIZE 0x10 #define UARTRXQUEUESIZE 0x10
class HardwareSerial : public Stream { class HardwareSerial : public Stream {
private: private:
@ -75,75 +74,35 @@ public:
return 0; return 0;
}; };
operator bool() { return true; }
operator bool() { void print(const char value[]) { printf("%s" , value); }
return true; void print(char value, int = 0) { printf("%c" , value); }
} void print(unsigned char value, int = 0) { printf("%u" , value); }
void print(int value, int = 0) { printf("%d" , value); }
void print(unsigned int value, int = 0) { printf("%u" , value); }
void print(long value, int = 0) { printf("%ld" , value); }
void print(unsigned long value, int = 0) { printf("%lu" , value); }
void print(const char value[]) { void print(float value, int round = 6) { printf("%f" , value); }
printf("%s" , value); void print(double value, int round = 6) { printf("%f" , value ); }
}
void print(char value, int = 0) {
printf("%c" , value);
}
void print(unsigned char value, int = 0) {
printf("%u" , value);
}
void print(int value, int = 0) {
printf("%d" , value);
}
void print(unsigned int value, int = 0) {
printf("%u" , value);
}
void print(long value, int = 0) {
printf("%ld" , value);
}
void print(unsigned long value, int = 0) {
printf("%lu" , value);
}
void print(float value, int round = 6) { void println(const char value[]) { printf("%s\n" , value); }
printf("%f" , value); void println(char value, int = 0) { printf("%c\n" , value); }
} void println(unsigned char value, int = 0) { printf("%u\r\n" , value); }
void print(double value, int round = 6) { void println(int value, int = 0) { printf("%d\n" , value); }
printf("%f" , value ); void println(unsigned int value, int = 0) { printf("%u\n" , value); }
} void println(long value, int = 0) { printf("%ld\n" , value); }
void println(unsigned long value, int = 0) { printf("%lu\n" , value); }
void println(const char value[]) { void println(float value, int round = 6) { printf("%f\n" , value ); }
printf("%s\n" , value); void println(double value, int round = 6) { printf("%f\n" , value ); }
} void println(void) { print('\n'); }
void println(char value, int = 0) {
printf("%c\n" , value);
}
void println(unsigned char value, int = 0) {
printf("%u\r\n" , value);
}
void println(int value, int = 0) {
printf("%d\n" , value);
}
void println(unsigned int value, int = 0) {
printf("%u\n" , value);
}
void println(long value, int = 0) {
printf("%ld\n" , value);
}
void println(unsigned long value, int = 0) {
printf("%lu\n" , value);
}
void println(float value, int round = 6) {
printf("%f\n" , value );
}
void println(double value, int round = 6) {
printf("%f\n" , value );
}
void println(void) {
print('\n');
}
}; };
//extern HardwareSerial Serial0; //extern HardwareSerial Serial0;
//extern HardwareSerial Serial1; //extern HardwareSerial Serial1;
//extern HardwareSerial Serial2; //extern HardwareSerial Serial2;
extern HardwareSerial Serial3; extern HardwareSerial Serial3;
#endif /* MARLIN_SRC_HAL_HAL_SERIAL_H_ */ #endif // MARLIN_SRC_HAL_HAL_SERIAL_H_

View file

@ -27,19 +27,19 @@
*/ */
/** /**
* This is a hybrid system. * This is a hybrid system.
* *
* The PWM1 module is used to directly control the Servo 0, 1 & 3 pins. This keeps * The PWM1 module is used to directly control the Servo 0, 1 & 3 pins. This keeps
* the pulse width jitter to under a microsecond. * the pulse width jitter to under a microsecond.
* *
* For all other pins the PWM1 module is used to generate interrupts. The ISR * For all other pins the PWM1 module is used to generate interrupts. The ISR
* routine does the actual setting/clearing of pins. The upside is that any pin can * routine does the actual setting/clearing of pins. The upside is that any pin can
* have a PWM channel assigned to it. The downside is that there is more pulse width * have a PWM channel assigned to it. The downside is that there is more pulse width
* jitter. The jitter depends on what else is happening in the system and what ISRs * jitter. The jitter depends on what else is happening in the system and what ISRs
* prempt the PWM ISR. Writing to the SD card can add 20 microseconds to the pulse * prempt the PWM ISR. Writing to the SD card can add 20 microseconds to the pulse
* width. * width.
*/ */
/** /**
* The data structures are setup to minimize the computation done by the ISR which * The data structures are setup to minimize the computation done by the ISR which
* minimizes ISR execution time. Execution times are 2.2 - 3.7 microseconds. * minimizes ISR execution time. Execution times are 2.2 - 3.7 microseconds.
@ -72,7 +72,7 @@ typedef struct { // holds all data needed to control/init one of the
uint16_t PWM_mask; // MASK TO CHECK/WRITE THE IR REGISTER uint16_t PWM_mask; // MASK TO CHECK/WRITE THE IR REGISTER
volatile uint32_t* set_register; volatile uint32_t* set_register;
volatile uint32_t* clr_register; volatile uint32_t* clr_register;
uint32_t write_mask; // USED BY SET/CLEAR COMMANDS uint32_t write_mask; // USED BY SET/CLEAR COMMANDS
uint32_t microseconds; // value written to MR register uint32_t microseconds; // value written to MR register
uint32_t min; // lower value limit checked by WRITE routine before writing to the MR register uint32_t min; // lower value limit checked by WRITE routine before writing to the MR register
uint32_t max; // upper value limit checked by WRITE routine before writing to the MR register uint32_t max; // upper value limit checked by WRITE routine before writing to the MR register
@ -180,7 +180,7 @@ void LPC1768_PWM_init(void) {
bool PWM_table_swap = false; // flag to tell the ISR that the tables have been swapped bool PWM_table_swap = false; // flag to tell the ISR that the tables have been swapped
bool PWM_MR0_wait = false; // flag to ensure don't delay MR0 interrupt bool PWM_MR0_wait = false; // flag to ensure don't delay MR0 interrupt
bool LPC1768_PWM_attach_pin(uint8_t pin, uint32_t min = 1, uint32_t max = (LPC_PWM1_MR0 - MR0_MARGIN), uint8_t servo_index = 0xff) { bool LPC1768_PWM_attach_pin(uint8_t pin, uint32_t min = 1, uint32_t max = (LPC_PWM1_MR0 - MR0_MARGIN), uint8_t servo_index = 0xff) {
@ -209,7 +209,7 @@ bool LPC1768_PWM_attach_pin(uint8_t pin, uint32_t min = 1, uint32_t max = (LPC_P
//swap tables //swap tables
PWM_MR0_wait = true; PWM_MR0_wait = true;
while (PWM_MR0_wait) delay(5); //wait until MR0 interrupt has happend so don't delay it. while (PWM_MR0_wait) delay(5); //wait until MR0 interrupt has happend so don't delay it.
NVIC_DisableIRQ(PWM1_IRQn); NVIC_DisableIRQ(PWM1_IRQn);
PWM_map *pointer_swap = active_table; PWM_map *pointer_swap = active_table;
active_table = work_table; active_table = work_table;
@ -235,8 +235,8 @@ typedef struct { // status of PWM1 channel
uint32_t PINSEL3_bits; // PINSEL3 register bits to set pin mode to PWM1 control uint32_t PINSEL3_bits; // PINSEL3 register bits to set pin mode to PWM1 control
} MR_map; } MR_map;
MR_map map_MR[NUM_PWMS]; MR_map map_MR[NUM_PWMS];
void LPC1768_PWM_update_map_MR(void) { void LPC1768_PWM_update_map_MR(void) {
map_MR[0] = {0, (uint8_t) (LPC_PWM1->PCR & _BV(8 + pin_4_PWM_channel) ? 1 : 0), 4, &LPC_PWM1->MR1, 0, 0}; map_MR[0] = {0, (uint8_t) (LPC_PWM1->PCR & _BV(8 + pin_4_PWM_channel) ? 1 : 0), 4, &LPC_PWM1->MR1, 0, 0};
map_MR[1] = {0, (uint8_t) (LPC_PWM1->PCR & _BV(8 + pin_11_PWM_channel) ? 1 : 0), 11, &LPC_PWM1->MR2, 0, 0}; map_MR[1] = {0, (uint8_t) (LPC_PWM1->PCR & _BV(8 + pin_11_PWM_channel) ? 1 : 0), 11, &LPC_PWM1->MR2, 0, 0};
@ -244,7 +244,7 @@ void LPC1768_PWM_update_map_MR(void) {
map_MR[3] = {0, 0, 0, &LPC_PWM1->MR4, 0, 0}; map_MR[3] = {0, 0, 0, &LPC_PWM1->MR4, 0, 0};
map_MR[4] = {0, 0, 0, &LPC_PWM1->MR5, 0, 0}; map_MR[4] = {0, 0, 0, &LPC_PWM1->MR5, 0, 0};
map_MR[5] = {0, 0, 0, &LPC_PWM1->MR6, 0, 0}; map_MR[5] = {0, 0, 0, &LPC_PWM1->MR6, 0, 0};
} }
uint32_t LPC1768_PWM_interrupt_mask = 1; uint32_t LPC1768_PWM_interrupt_mask = 1;
@ -265,46 +265,46 @@ void LPC1768_PWM_update(void) {
} }
LPC1768_PWM_interrupt_mask = 0; // set match registers to new values, build IRQ mask LPC1768_PWM_interrupt_mask = 0; // set match registers to new values, build IRQ mask
for (uint8_t i = 0; i < NUM_PWMS; i++) { for (uint8_t i = 0; i < NUM_PWMS; i++) {
if (work_table[i].active_flag == true) { if (work_table[i].active_flag == true) {
work_table[i].sequence = i + 1; work_table[i].sequence = i + 1;
// first see if there is a PWM1 controlled pin for this entry // first see if there is a PWM1 controlled pin for this entry
bool found = false; bool found = false;
for (uint8_t j = 0; (j < NUM_PWMS) && !found; j++) { for (uint8_t j = 0; (j < NUM_PWMS) && !found; j++) {
if ( (map_MR[j].map_PWM_PIN == work_table[i].logical_pin) && map_MR[j].map_PWM_INT ) { if ( (map_MR[j].map_PWM_PIN == work_table[i].logical_pin) && map_MR[j].map_PWM_INT ) {
*map_MR[j].MR_register = work_table[i].microseconds; // found one of the PWM pins *map_MR[j].MR_register = work_table[i].microseconds; // found one of the PWM pins
work_table[i].PWM_mask = 0; work_table[i].PWM_mask = 0;
work_table[i].PCR_bit = map_MR[j].PCR_bit; // PCR register bit to enable PWM1 control of this pin work_table[i].PCR_bit = map_MR[j].PCR_bit; // PCR register bit to enable PWM1 control of this pin
work_table[i].PINSEL3_bits = map_MR[j].PINSEL3_bits; // PINSEL3 register bits to set pin mode to PWM1 control} MR_map; work_table[i].PINSEL3_bits = map_MR[j].PINSEL3_bits; // PINSEL3 register bits to set pin mode to PWM1 control} MR_map;
map_MR[j].map_used = 2; map_MR[j].map_used = 2;
work_table[i].assigned_MR = j +1; // only used to help in debugging work_table[i].assigned_MR = j +1; // only used to help in debugging
found = true; found = true;
} }
} }
// didn't find a PWM1 pin so get an interrupt // didn't find a PWM1 pin so get an interrupt
for (uint8_t k = 0; (k < NUM_PWMS) && !found; k++) { for (uint8_t k = 0; (k < NUM_PWMS) && !found; k++) {
if ( !(map_MR[k].map_PWM_INT || map_MR[k].map_used)) { if ( !(map_MR[k].map_PWM_INT || map_MR[k].map_used)) {
*map_MR[k].MR_register = work_table[i].microseconds; // found one for an interrupt pin *map_MR[k].MR_register = work_table[i].microseconds; // found one for an interrupt pin
map_MR[k].map_used = 1; map_MR[k].map_used = 1;
LPC1768_PWM_interrupt_mask |= _BV(3 * (k + 1)); // set bit in the MCR to enable this MR to generate an interrupt LPC1768_PWM_interrupt_mask |= _BV(3 * (k + 1)); // set bit in the MCR to enable this MR to generate an interrupt
work_table[i].PWM_mask = _BV(IR_BIT(k + 1)); // bit in the IR that will go active when this MR generates an interrupt work_table[i].PWM_mask = _BV(IR_BIT(k + 1)); // bit in the IR that will go active when this MR generates an interrupt
work_table[i].assigned_MR = k +1; // only used to help in debugging work_table[i].assigned_MR = k +1; // only used to help in debugging
found = true; found = true;
} }
} }
} }
else else
work_table[i].sequence = 0; work_table[i].sequence = 0;
} }
LPC1768_PWM_interrupt_mask |= (uint32_t) _BV(0); // add in MR0 interrupt LPC1768_PWM_interrupt_mask |= (uint32_t) _BV(0); // add in MR0 interrupt
// swap tables // swap tables
PWM_MR0_wait = true; PWM_MR0_wait = true;
while (PWM_MR0_wait) delay(5); //wait until MR0 interrupt has happend so don't delay it. while (PWM_MR0_wait) delay(5); //wait until MR0 interrupt has happend so don't delay it.
NVIC_DisableIRQ(PWM1_IRQn); NVIC_DisableIRQ(PWM1_IRQn);
LPC_PWM1->LER = 0x07E; // Set the latch Enable Bits to load the new Match Values for MR1 - MR6 LPC_PWM1->LER = 0x07E; // Set the latch Enable Bits to load the new Match Values for MR1 - MR6
PWM_map *pointer_swap = active_table; PWM_map *pointer_swap = active_table;
@ -324,7 +324,7 @@ bool LPC1768_PWM_write(uint8_t pin, uint32_t value) {
if (slot == 0xFF) return false; // return error if pin not found if (slot == 0xFF) return false; // return error if pin not found
LPC1768_PWM_update_map_MR(); LPC1768_PWM_update_map_MR();
switch(pin) { switch(pin) {
case 11: // Servo 0, PWM1 channel 2 (Pin 11 P1.20 PWM1.2) case 11: // Servo 0, PWM1 channel 2 (Pin 11 P1.20 PWM1.2)
map_MR[pin_11_PWM_channel - 1].PCR_bit = _BV(8 + pin_11_PWM_channel); // enable PWM1 module control of this pin map_MR[pin_11_PWM_channel - 1].PCR_bit = _BV(8 + pin_11_PWM_channel); // enable PWM1 module control of this pin
@ -337,22 +337,22 @@ bool LPC1768_PWM_write(uint8_t pin, uint32_t value) {
map_MR[pin_6_PWM_channel - 1].PINSEL3_bits = 0x2 << 10; // ISR must do this AFTER setting PCR map_MR[pin_6_PWM_channel - 1].PINSEL3_bits = 0x2 << 10; // ISR must do this AFTER setting PCR
break; break;
case 4: // Servo 3, PWM1 channel 1 (Pin 4 P1.18 PWM1.1) case 4: // Servo 3, PWM1 channel 1 (Pin 4 P1.18 PWM1.1)
map_MR[pin_4_PWM_channel - 1].PCR_bit = _BV(8 + pin_4_PWM_channel); // enable PWM1 module control of this pin map_MR[pin_4_PWM_channel - 1].PCR_bit = _BV(8 + pin_4_PWM_channel); // enable PWM1 module control of this pin
map_MR[pin_4_PWM_channel - 1].map_PWM_INT = 1; // 0 - available for interrupts, 1 - in use by PWM map_MR[pin_4_PWM_channel - 1].map_PWM_INT = 1; // 0 - available for interrupts, 1 - in use by PWM
map_MR[pin_4_PWM_channel - 1].PINSEL3_bits = 0x2 << 4; // ISR must do this AFTER setting PCR map_MR[pin_4_PWM_channel - 1].PINSEL3_bits = 0x2 << 4; // ISR must do this AFTER setting PCR
break; break;
default: // ISR pins default: // ISR pins
pinMode(pin, OUTPUT); // set pin to output but don't write anything in case it's already in use pinMode(pin, OUTPUT); // set pin to output but don't write anything in case it's already in use
break; break;
} }
work_table[slot].microseconds = MAX(MIN(value, work_table[slot].max), work_table[slot].min); work_table[slot].microseconds = MAX(MIN(value, work_table[slot].max), work_table[slot].min);
work_table[slot].active_flag = true; work_table[slot].active_flag = true;
LPC1768_PWM_update(); LPC1768_PWM_update();
return 1; return 1;
} }
bool LPC1768_PWM_detach_pin(uint8_t pin) { bool LPC1768_PWM_detach_pin(uint8_t pin) {
@ -382,16 +382,16 @@ bool LPC1768_PWM_detach_pin(uint8_t pin) {
map_MR[pin_6_PWM_channel - 1].map_PWM_INT = 0; // 0 - available for interrupts, 1 - in use by PWM map_MR[pin_6_PWM_channel - 1].map_PWM_INT = 0; // 0 - available for interrupts, 1 - in use by PWM
break; break;
case 4: // Servo 3, PWM1 channel 1 (Pin 4 P1.18 PWM1.1) case 4: // Servo 3, PWM1 channel 1 (Pin 4 P1.18 PWM1.1)
LPC_PWM1->PCR &= ~(_BV(8 + pin_4_PWM_channel)); // disable PWM1 module control of this pin LPC_PWM1->PCR &= ~(_BV(8 + pin_4_PWM_channel)); // disable PWM1 module control of this pin
map_MR[pin_4_PWM_channel - 1].PCR_bit = 0; map_MR[pin_4_PWM_channel - 1].PCR_bit = 0;
LPC_PINCON->PINSEL3 &= ~(0x3 << 4); // return pin to general purpose I/O LPC_PINCON->PINSEL3 &= ~(0x3 << 4); // return pin to general purpose I/O
map_MR[pin_4_PWM_channel - 1].PINSEL3_bits = 0; map_MR[pin_4_PWM_channel - 1].PINSEL3_bits = 0;
map_MR[pin_4_PWM_channel - 1].map_PWM_INT = 0; // 0 - available for interrupts, 1 - in use by PWM map_MR[pin_4_PWM_channel - 1].map_PWM_INT = 0; // 0 - available for interrupts, 1 - in use by PWM
break; break;
} }
pinMode(pin, INPUT); pinMode(pin, INPUT);
work_table[slot] = PWM_MAP_INIT_ROW; work_table[slot] = PWM_MAP_INIT_ROW;
LPC1768_PWM_update(); LPC1768_PWM_update();
@ -411,8 +411,8 @@ bool LPC1768_PWM_detach_pin(uint8_t pin) {
* Changes to PINSEL3, PCR and MCR are only done during the MR0 interrupt otherwise * Changes to PINSEL3, PCR and MCR are only done during the MR0 interrupt otherwise
* the wrong pin may be toggled or even have the system hang. * the wrong pin may be toggled or even have the system hang.
*/ */
HAL_PWM_LPC1768_ISR { HAL_PWM_LPC1768_ISR {
if (PWM_table_swap) ISR_table = work_table; // use old table if a swap was just done if (PWM_table_swap) ISR_table = work_table; // use old table if a swap was just done
else ISR_table = active_table; else ISR_table = active_table;
@ -422,13 +422,13 @@ HAL_PWM_LPC1768_ISR {
if (PWM_table_swap) LPC_PWM1->MCR = LPC1768_PWM_interrupt_mask; // enable new PWM individual channel interrupts if (PWM_table_swap) LPC_PWM1->MCR = LPC1768_PWM_interrupt_mask; // enable new PWM individual channel interrupts
for (uint8_t i = 0; (i < NUM_PWMS) ; i++) { for (uint8_t i = 0; (i < NUM_PWMS) ; i++) {
if(ISR_table[i].active_flag && !((ISR_table[i].logical_pin == 11) || if(ISR_table[i].active_flag && !((ISR_table[i].logical_pin == 11) ||
(ISR_table[i].logical_pin == 4) || (ISR_table[i].logical_pin == 4) ||
(ISR_table[i].logical_pin == 6))) (ISR_table[i].logical_pin == 6)))
*ISR_table[i].set_register = ISR_table[i].write_mask; // set pins for all enabled interrupt channels active *ISR_table[i].set_register = ISR_table[i].write_mask; // set pins for all enabled interrupt channels active
if (PWM_table_swap && ISR_table[i].PCR_bit) { if (PWM_table_swap && ISR_table[i].PCR_bit) {
LPC_PWM1->PCR |= ISR_table[i].PCR_bit; // enable PWM1 module control of this pin LPC_PWM1->PCR |= ISR_table[i].PCR_bit; // enable PWM1 module control of this pin
LPC_PINCON->PINSEL3 |= ISR_table[i].PINSEL3_bits; // set pin mode to PWM1 control - must be done after PCR LPC_PINCON->PINSEL3 |= ISR_table[i].PINSEL3_bits; // set pin mode to PWM1 control - must be done after PCR
} }
} }
PWM_table_swap = false; PWM_table_swap = false;
@ -442,7 +442,7 @@ HAL_PWM_LPC1768_ISR {
*ISR_table[i].clr_register = ISR_table[i].write_mask; // set channel to inactive *ISR_table[i].clr_register = ISR_table[i].write_mask; // set channel to inactive
} }
} }
LPC_PWM1->IR = 0x70F; // guarantees all interrupt flags are cleared which, if there is an unexpected LPC_PWM1->IR = 0x70F; // guarantees all interrupt flags are cleared which, if there is an unexpected
// PWM interrupt, will keep the ISR from hanging which will crash the controller // PWM interrupt, will keep the ISR from hanging which will crash the controller
@ -457,20 +457,20 @@ return;
/** /**
* Almost all changes to the hardware registers must be coordinated with the Match Register 0 (MR0) * Almost all changes to the hardware registers must be coordinated with the Match Register 0 (MR0)
* interrupt. The only exception is detaching pins. It doesn't matter when they go * interrupt. The only exception is detaching pins. It doesn't matter when they go
* tristate. * tristate.
* *
* The LPC1768_PWM_init routine kicks off the MR0 interrupt. This interrupt is never disabled or * The LPC1768_PWM_init routine kicks off the MR0 interrupt. This interrupt is never disabled or
* delayed. * delayed.
* *
* The PWM_table_swap flag is set when the firmware has swapped in an updated table. It is * The PWM_table_swap flag is set when the firmware has swapped in an updated table. It is
* cleared by the ISR during the MR0 interrupt as it completes the swap and accompanying updates. * cleared by the ISR during the MR0 interrupt as it completes the swap and accompanying updates.
* It serves two purposes: * It serves two purposes:
* 1) Tells the ISR that the tables have been swapped * 1) Tells the ISR that the tables have been swapped
* 2) Keeps the firmware from starting a new update until the previous one has been completed. * 2) Keeps the firmware from starting a new update until the previous one has been completed.
* *
* The PWM_MR0_wait flag is set when the firmware is ready to swap in an updated table and cleared by * The PWM_MR0_wait flag is set when the firmware is ready to swap in an updated table and cleared by
* the ISR during the MR0 interrupt. It is used to avoid delaying the MR0 interrupt when swapping in * the ISR during the MR0 interrupt. It is used to avoid delaying the MR0 interrupt when swapping in
* an updated table. This avoids glitches in pulse width and/or repetition rate. * an updated table. This avoids glitches in pulse width and/or repetition rate.
* *
* The sequence of events during a write to a PWM channel is: * The sequence of events during a write to a PWM channel is:
* 1) Waits until PWM_table_swap flag is false before starting * 1) Waits until PWM_table_swap flag is false before starting
@ -489,7 +489,7 @@ return;
* writes to the LER register * writes to the LER register
* sets the PWM_table_swap flag active * sets the PWM_table_swap flag active
* re-enables the ISR * re-enables the ISR
* 7) On the next interrupt the ISR changes its pointer to the work table which is now the old, * 7) On the next interrupt the ISR changes its pointer to the work table which is now the old,
* unmodified, active table. * unmodified, active table.
* 8) On the next MR0 interrupt the ISR: * 8) On the next MR0 interrupt the ISR:
* switches over to the active table * switches over to the active table
@ -500,4 +500,4 @@ return;
* NOTE - PCR must be set before PINSEL * NOTE - PCR must be set before PINSEL
* sets the pins controlled by the ISR to their active states * sets the pins controlled by the ISR to their active states
*/ */

View file

@ -88,7 +88,7 @@ static const DELAY_TABLE table[] =
/* static */ /* static */
inline void SoftwareSerial::tunedDelay(uint32_t count) { inline void SoftwareSerial::tunedDelay(uint32_t count) {
asm volatile( asm volatile(
"mov r3, %[loopsPerMicrosecond] \n\t" //load the initial loop counter "mov r3, %[loopsPerMicrosecond] \n\t" //load the initial loop counter
"1: \n\t" "1: \n\t"
@ -163,7 +163,7 @@ void SoftwareSerial::recv()
// Read each of the 8 bits // Read each of the 8 bits
for (uint8_t i=8; i > 0; --i) for (uint8_t i=8; i > 0; --i)
{ {
tunedDelay(_rx_delay_intrabit); tunedDelay(_rx_delay_intrabit);
d >>= 1; d >>= 1;
if (rx_pin_read()) if (rx_pin_read())
d |= 0x80; d |= 0x80;
@ -184,9 +184,9 @@ void SoftwareSerial::recv()
{ {
_buffer_overflow = true; _buffer_overflow = true;
} }
tunedDelay(_rx_delay_stopbit); tunedDelay(_rx_delay_stopbit);
// Re-enable interrupts when we're sure to be inside the stop bit // Re-enable interrupts when we're sure to be inside the stop bit
setRxIntMsk(true);//__enable_irq();// setRxIntMsk(true);//__enable_irq();//
} }
} }
@ -339,7 +339,7 @@ size_t SoftwareSerial::write(uint8_t b)
uint16_t delay = _tx_delay; uint16_t delay = _tx_delay;
if(inv) if(inv)
b = ~b; b = ~b;
cli(); // turn off interrupts for a clean txmit cli(); // turn off interrupts for a clean txmit
@ -369,7 +369,7 @@ size_t SoftwareSerial::write(uint8_t b)
else else
digitalWrite(_transmitPin, 1); digitalWrite(_transmitPin, 1);
sei(); // turn interrupts back on sei(); // turn interrupts back on
tunedDelay(delay); tunedDelay(delay);
return 1; return 1;

View file

@ -32,7 +32,7 @@ void cli(void) { __disable_irq(); } // Disable
void sei(void) { __enable_irq(); } // Enable void sei(void) { __enable_irq(); } // Enable
// Time functions // Time functions
void _delay_ms(int delay_ms) { void _delay_ms(const int delay_ms) {
delay(delay_ms); delay(delay_ms);
} }

View file

@ -94,7 +94,7 @@ extern "C" void GpioDisableInt(uint32_t port, uint32_t pin);
extern "C" { extern "C" {
void delay(const int milis); void delay(const int milis);
} }
void _delay_ms(int delay); void _delay_ms(const int delay);
void delayMicroseconds(unsigned long); void delayMicroseconds(unsigned long);
uint32_t millis(); uint32_t millis();

View file

@ -33,5 +33,5 @@
#else #else
#error Unsupported Platform! #error Unsupported Platform!
#endif #endif
#endif #endif

View file

@ -1,9 +1,9 @@
/* ************************************************************************** /* **************************************************************************
Marlin 3D Printer Firmware Marlin 3D Printer Firmware
Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
This program is free software: you can redistribute it and/or modify This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or the Free Software Foundation, either version 3 of the License, or

View file

@ -1,5 +1,5 @@
/* ************************************************************************** /* **************************************************************************
Marlin 3D Printer Firmware Marlin 3D Printer Firmware
Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com

View file

@ -50,8 +50,8 @@
#define IS_ANALOG(P) ((P) >= analogInputToDigitalPin(0) && (P) <= analogInputToDigitalPin(9)) || ((P) >= analogInputToDigitalPin(12) && (P) <= analogInputToDigitalPin(20)) #define IS_ANALOG(P) ((P) >= analogInputToDigitalPin(0) && (P) <= analogInputToDigitalPin(9)) || ((P) >= analogInputToDigitalPin(12) && (P) <= analogInputToDigitalPin(20))
void HAL_print_analog_pin(char buffer[], int8_t pin) { void HAL_print_analog_pin(char buffer[], int8_t pin) {
if (pin <= 23) sprintf(buffer, "(A%2d) ", int(pin - 14)); if (pin <= 23) sprintf(buffer, "(A%2d) ", int(pin - 14));
else if (pin <= 39) sprintf(buffer, "(A%2d) ", int(pin - 19)); else if (pin <= 39) sprintf(buffer, "(A%2d) ", int(pin - 19));
} }
void HAL_analog_pin_state(char buffer[], int8_t pin) { void HAL_analog_pin_state(char buffer[], int8_t pin) {

View file

@ -33,20 +33,20 @@ void spiBegin(void) {
/** Configure SPI for specified SPI speed */ /** Configure SPI for specified SPI speed */
void spiInit(uint8_t spiRate) { void spiInit(uint8_t spiRate) {
// Use datarates Marlin uses // Use datarates Marlin uses
uint32_t clock; uint32_t clock;
switch (spiRate) { switch (spiRate) {
case SPI_FULL_SPEED: clock = 10000000; break; case SPI_FULL_SPEED: clock = 10000000; break;
case SPI_HALF_SPEED: clock = 5000000; break; case SPI_HALF_SPEED: clock = 5000000; break;
case SPI_QUARTER_SPEED: clock = 2500000; break; case SPI_QUARTER_SPEED: clock = 2500000; break;
case SPI_EIGHTH_SPEED: clock = 1250000; break; case SPI_EIGHTH_SPEED: clock = 1250000; break;
case SPI_SPEED_5: clock = 625000; break; case SPI_SPEED_5: clock = 625000; break;
case SPI_SPEED_6: clock = 312500; break; case SPI_SPEED_6: clock = 312500; break;
default: default:
clock = 4000000; // Default from the SPI libarary clock = 4000000; // Default from the SPI libarary
} }
spiConfig = SPISettings(clock, MSBFIRST, SPI_MODE0); spiConfig = SPISettings(clock, MSBFIRST, SPI_MODE0);
SPI.begin(); SPI.begin();
} }
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------

View file

@ -1,9 +1,9 @@
/* ************************************************************************** /* **************************************************************************
Marlin 3D Printer Firmware Marlin 3D Printer Firmware
Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
This program is free software: you can redistribute it and/or modify This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or the Free Software Foundation, either version 3 of the License, or

View file

@ -1,5 +1,5 @@
/* ************************************************************************** /* **************************************************************************
Marlin 3D Printer Firmware Marlin 3D Printer Firmware
Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com

View file

@ -21,20 +21,13 @@
*/ */
/** /**
This code contributed by Triffid_Hunter and modified by Kliment * Fast I/O Routines for Teensy 3.5 and Teensy 3.6
why double up on these macros? see http://gcc.gnu.org/onlinedocs/cpp/Stringification.html * Use direct port manipulation to save scads of processor time.
*/ * Contributed by Triffid_Hunter. Modified by Kliment and the Marlin team.
/**
* Description: Fast IO functions for Teensy 3.5 and Teensy 3.6
*/ */
#ifndef _FASTIO_TEENSY_H #ifndef _FASTIO_TEENSY_H
#define _FASTIO_TEENSY_H #define _FASTIO_TEENSY_H
/**
utility functions
*/
#ifndef MASK #ifndef MASK
#define MASK(PIN) (1 << PIN) #define MASK(PIN) (1 << PIN)
@ -44,77 +37,50 @@
#define GPIO_BITBAND(reg, bit) (*(uint32_t *)GPIO_BITBAND_ADDR((reg), (bit))) #define GPIO_BITBAND(reg, bit) (*(uint32_t *)GPIO_BITBAND_ADDR((reg), (bit)))
/** /**
magic I/O routines * Magic I/O routines
now you can simply SET_OUTPUT(STEP); WRITE(STEP, 1); WRITE(STEP, 0); *
*/ * Now you can simply SET_OUTPUT(PIN); WRITE(PIN, HIGH); WRITE(PIN, LOW);
*
* Why double up on these macros? see http://gcc.gnu.org/onlinedocs/cpp/Stringification.html
*/
/// Read a pin
#define _READ(p) ((bool)(CORE_PIN ## p ## _PINREG & CORE_PIN ## p ## _BITMASK)) #define _READ(p) ((bool)(CORE_PIN ## p ## _PINREG & CORE_PIN ## p ## _BITMASK))
/// Write to a pin
#define _WRITE(p, v) do { if (v) CORE_PIN ## p ## _PORTSET = CORE_PIN ## p ## _BITMASK; \ #define _WRITE(p, v) do { if (v) CORE_PIN ## p ## _PORTSET = CORE_PIN ## p ## _BITMASK; \
else CORE_PIN ## p ## _PORTCLEAR = CORE_PIN ## p ## _BITMASK; } while (0) else CORE_PIN ## p ## _PORTCLEAR = CORE_PIN ## p ## _BITMASK; } while (0)
/// toggle a pin
#define _TOGGLE(p) (*(&(CORE_PIN ## p ## _PORTCLEAR)+1) = CORE_PIN ## p ## _BITMASK) #define _TOGGLE(p) (*(&(CORE_PIN ## p ## _PORTCLEAR)+1) = CORE_PIN ## p ## _BITMASK)
#define _SET_INPUT(p) do { CORE_PIN ## p ## _CONFIG = PORT_PCR_MUX(1); \
GPIO_BITBAND(CORE_PIN ## p ## _DDRREG , CORE_PIN ## p ## _BIT) = 0; \
} while (0)
#define _SET_OUTPUT(p) do { CORE_PIN ## p ## _CONFIG = PORT_PCR_MUX(1)|PORT_PCR_SRE|PORT_PCR_DSE; \
GPIO_BITBAND(CORE_PIN ## p ## _DDRREG , CORE_PIN ## p ## _BIT) = 1; \
} while (0)
/// set pin as input
#define _SET_INPUT(p) do { CORE_PIN ## p ## _CONFIG = PORT_PCR_MUX(1); \
GPIO_BITBAND(CORE_PIN ## p ## _DDRREG , CORE_PIN ## p ## _BIT) = 0; \
} while (0)
/// set pin as output
#define _SET_OUTPUT(p) do { CORE_PIN ## p ## _CONFIG = PORT_PCR_MUX(1)|PORT_PCR_SRE|PORT_PCR_DSE; \
GPIO_BITBAND(CORE_PIN ## p ## _DDRREG , CORE_PIN ## p ## _BIT) = 1; \
} while (0)
/// set pin as input with pullup mode
//#define _PULLUP(IO, v) { pinMode(IO, (v!=LOW ? INPUT_PULLUP : INPUT)); } //#define _PULLUP(IO, v) { pinMode(IO, (v!=LOW ? INPUT_PULLUP : INPUT)); }
/// check if pin is an input
#define _GET_INPUT(p) ((CORE_PIN ## p ## _DDRREG & CORE_PIN ## p ## _BITMASK) == 0) #define _GET_INPUT(p) ((CORE_PIN ## p ## _DDRREG & CORE_PIN ## p ## _BITMASK) == 0)
/// check if pin is an output
#define _GET_OUTPUT(p) ((CORE_PIN ## p ## _DDRREG & CORE_PIN ## p ## _BITMASK) == 0) #define _GET_OUTPUT(p) ((CORE_PIN ## p ## _DDRREG & CORE_PIN ## p ## _BITMASK) == 0)
/// check if pin is an timer
//#define _GET_TIMER(IO) //#define _GET_TIMER(IO)
// why double up on these macros? see http://gcc.gnu.org/onlinedocs/cpp/Stringification.html
/// Read a pin wrapper
#define READ(IO) _READ(IO) #define READ(IO) _READ(IO)
/// Write to a pin wrapper
#define WRITE_VAR(IO, v) _WRITE_VAR(IO, v) #define WRITE_VAR(IO, v) _WRITE_VAR(IO, v)
#define WRITE(IO, v) _WRITE(IO, v) #define WRITE(IO, v) _WRITE(IO, v)
/// toggle a pin wrapper
#define TOGGLE(IO) _TOGGLE(IO) #define TOGGLE(IO) _TOGGLE(IO)
/// set pin as input wrapper
#define SET_INPUT(IO) _SET_INPUT(IO) #define SET_INPUT(IO) _SET_INPUT(IO)
/// set pin as input with pullup wrapper
#define SET_INPUT_PULLUP(IO) do{ _SET_INPUT(IO); _WRITE(IO, HIGH); }while(0) #define SET_INPUT_PULLUP(IO) do{ _SET_INPUT(IO); _WRITE(IO, HIGH); }while(0)
/// set pin as output wrapper
#define SET_OUTPUT(IO) _SET_OUTPUT(IO) #define SET_OUTPUT(IO) _SET_OUTPUT(IO)
/// check if pin is an input wrapper
#define GET_INPUT(IO) _GET_INPUT(IO) #define GET_INPUT(IO) _GET_INPUT(IO)
/// check if pin is an output wrapper
#define GET_OUTPUT(IO) _GET_OUTPUT(IO) #define GET_OUTPUT(IO) _GET_OUTPUT(IO)
// Shorthand
#define OUT_WRITE(IO, v) { SET_OUTPUT(IO); WRITE(IO, v); } #define OUT_WRITE(IO, v) { SET_OUTPUT(IO); WRITE(IO, v); }
/** /**
ports and functions * Ports, functions, and pins
*/
added as necessary or if I feel like it- not a comprehensive list!
*/
/**
pins
*/
#define DIO0_PIN 8 #define DIO0_PIN 8
#endif /* _FASTIO_TEENSY_H */ #endif /* _FASTIO_TEENSY_H */

View file

@ -23,9 +23,9 @@
#ifndef SPI_PINS_H_ #ifndef SPI_PINS_H_
#define SPI_PINS_H_ #define SPI_PINS_H_
#define SCK_PIN 13 #define SCK_PIN 13
#define MISO_PIN 12 #define MISO_PIN 12
#define MOSI_PIN 11 #define MOSI_PIN 11
#define SS_PIN 20 //SDSS // A.28, A.29, B.21, C.26, C.29 #define SS_PIN 20 //SDSS // A.28, A.29, B.21, C.26, C.29
#endif /* SPI_PINS_H_ */ #endif /* SPI_PINS_H_ */

View file

@ -21,19 +21,19 @@
*/ */
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) #if defined(__MK64FX512__) || defined(__MK66FX1M0__)
#include "../../Marlin.h"
#if ENABLED(USE_WATCHDOG) #include "../../inc/MarlinConfig.h"
#include "watchdog_Teensy.h" #if ENABLED(USE_WATCHDOG)
void watchdog_init() { #include "watchdog_Teensy.h"
WDOG_TOVALH = 0;
WDOG_TOVALL = 4000;
WDOG_STCTRLH = WDOG_STCTRLH_WDOGEN;
}
#endif //USE_WATCHDOG void watchdog_init() {
WDOG_TOVALH = 0;
WDOG_TOVALL = 4000;
WDOG_STCTRLH = WDOG_STCTRLH_WDOGEN;
}
#endif #endif // USE_WATCHDOG
#endif // __MK64FX512__ || __MK66FX1M0__