Merge pull request #10051 from Bob-the-Kuhn/PR-9661-
[2.0.x] restore PR 9661 (DUE compatibility with shared SPI LCDs, USB mass storage, add pin defs & update examples\MakerParts\Configuration.h)
This commit is contained in:
Bob-the-Kuhn
commit
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GPG key ID:
4AEE18F83AFDEB23
11 changed files with 746 additions and 227 deletions
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@ -41,15 +41,7 @@
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// Defines
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// Defines
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//
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//
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#define NUM_SERIAL 1
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#define NUM_SERIAL 1
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#define MYSERIAL0 customizedSerial
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//#undef SERIAL_PORT
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//#define SERIAL_PORT -1
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#if SERIAL_PORT == -1
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#define MYSERIAL0 SerialUSB
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#else
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#define MYSERIAL0 customizedSerial
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#endif
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// We need the previous define before the include, or compilation bombs...
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// We need the previous define before the include, or compilation bombs...
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#include "MarlinSerial_Due.h"
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#include "MarlinSerial_Due.h"
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@ -53,6 +53,7 @@
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// --------------------------------------------------------------------------
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// --------------------------------------------------------------------------
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#if ENABLED(SOFTWARE_SPI)
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#if ENABLED(SOFTWARE_SPI)
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// --------------------------------------------------------------------------
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// --------------------------------------------------------------------------
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// software SPI
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// software SPI
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// --------------------------------------------------------------------------
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// --------------------------------------------------------------------------
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@ -493,44 +494,77 @@
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static pfnSpiTxBlock spiTxBlock = spiTxBlockX;
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static pfnSpiTxBlock spiTxBlock = spiTxBlockX;
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static pfnSpiRxBlock spiRxBlock = spiRxBlockX;
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static pfnSpiRxBlock spiRxBlock = spiRxBlockX;
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void spiBegin() {
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#if MB(ALLIGATOR) // control SDSS pin
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SET_OUTPUT(SS_PIN);
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void spiBegin() {
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WRITE(SS_PIN, HIGH);
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SET_OUTPUT(SS_PIN);
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SET_OUTPUT(SCK_PIN);
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WRITE(SS_PIN, HIGH);
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SET_INPUT(MISO_PIN);
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SET_OUTPUT(SCK_PIN);
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SET_OUTPUT(MOSI_PIN);
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SET_INPUT(MISO_PIN);
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}
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SET_OUTPUT(MOSI_PIN);
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}
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uint8_t spiRec() {
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uint8_t spiRec() {
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WRITE(SS_PIN, LOW);
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WRITE(SS_PIN, LOW);
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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uint8_t b = spiTransferRx(0xFF);
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uint8_t b = spiTransferRx(0xFF);
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WRITE(SS_PIN, HIGH);
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WRITE(SS_PIN, HIGH);
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return b;
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return b;
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}
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}
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void spiRead(uint8_t* buf, uint16_t nbyte) {
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void spiRead(uint8_t* buf, uint16_t nbyte) {
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uint32_t todo = nbyte;
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uint32_t todo = nbyte;
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if (todo == 0) return;
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if (todo == 0) return;
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WRITE(SS_PIN, LOW);
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WRITE(SS_PIN, LOW);
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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spiRxBlock(buf,nbyte);
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spiRxBlock(buf,nbyte);
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WRITE(SS_PIN, HIGH);
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WRITE(SS_PIN, HIGH);
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}
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}
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void spiSend(uint8_t b) {
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void spiSend(uint8_t b) {
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WRITE(SS_PIN, LOW);
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WRITE(SS_PIN, LOW);
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(void) spiTransferTx(b);
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(void) spiTransferTx(b);
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WRITE(SS_PIN, HIGH);
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WRITE(SS_PIN, HIGH);
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}
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}
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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WRITE(SS_PIN, LOW);
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(void) spiTransferTx(token);
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spiTxBlock(buf,512);
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WRITE(SS_PIN, HIGH);
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#else // let calling routine control SDSS
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void spiBegin() {
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SET_OUTPUT(SS_PIN);
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SET_OUTPUT(SCK_PIN);
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SET_INPUT(MISO_PIN);
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SET_OUTPUT(MOSI_PIN);
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}
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uint8_t spiRec() {
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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uint8_t b = spiTransferRx(0xFF);
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return b;
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}
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void spiRead(uint8_t* buf, uint16_t nbyte) {
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uint32_t todo = nbyte;
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if (todo == 0) return;
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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spiRxBlock(buf,nbyte);
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}
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void spiSend(uint8_t b) {
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(void) spiTransferTx(b);
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}
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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(void) spiTransferTx(token);
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spiTxBlock(buf,512);
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#endif
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WRITE(SS_PIN, LOW);
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(void) spiTransferTx(token);
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spiTxBlock(buf,512);
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WRITE(SS_PIN, HIGH);
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}
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}
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/**
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/**
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@ -566,7 +600,9 @@
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break;
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break;
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}
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}
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WRITE(SS_PIN, HIGH);
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#if MB(ALLIGATOR)
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WRITE(SS_PIN, HIGH);
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#endif
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WRITE(MOSI_PIN, HIGH);
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WRITE(MOSI_PIN, HIGH);
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WRITE(SCK_PIN, LOW);
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WRITE(SCK_PIN, LOW);
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}
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}
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@ -574,211 +610,296 @@
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/** Begin SPI transaction, set clock, bit order, data mode */
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/** Begin SPI transaction, set clock, bit order, data mode */
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void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
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void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
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// TODO: to be implemented
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// TODO: to be implemented
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}
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}
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#pragma GCC reset_options
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#pragma GCC reset_options
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#else
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#else
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// --------------------------------------------------------------------------
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// hardware SPI
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// --------------------------------------------------------------------------
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// 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
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int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
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bool spiInitMaded = false;
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void spiBegin() {
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#if MB(ALLIGATOR)
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if(spiInitMaded == false) {
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// Configure SPI pins
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PIO_Configure(
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g_APinDescription[SCK_PIN].pPort,
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g_APinDescription[SCK_PIN].ulPinType,
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g_APinDescription[SCK_PIN].ulPin,
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g_APinDescription[SCK_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MOSI_PIN].pPort,
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g_APinDescription[MOSI_PIN].ulPinType,
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g_APinDescription[MOSI_PIN].ulPin,
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g_APinDescription[MOSI_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MISO_PIN].pPort,
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g_APinDescription[MISO_PIN].ulPinType,
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g_APinDescription[MISO_PIN].ulPin,
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g_APinDescription[MISO_PIN].ulPinConfiguration);
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// set master mode, peripheral select, fault detection
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// slave selects controlled by SPI controller
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SPI_Configure(SPI0, ID_SPI0, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PS);
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// doesn't support changing SPI speeds for SD card
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SPI_Enable(SPI0);
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#if MB(ALLIGATOR)
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// --------------------------------------------------------------------------
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SET_OUTPUT(DAC0_SYNC);
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// hardware SPI
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#if EXTRUDERS > 1
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// --------------------------------------------------------------------------
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SET_OUTPUT(DAC1_SYNC);
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// 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
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WRITE(DAC1_SYNC, HIGH);
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int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
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#endif
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bool spiInitMaded = false;
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SET_OUTPUT(SPI_EEPROM1_CS);
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SET_OUTPUT(SPI_EEPROM2_CS);
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SET_OUTPUT(SPI_FLASH_CS);
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WRITE(DAC0_SYNC, HIGH);
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WRITE(SPI_EEPROM1_CS, HIGH );
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WRITE(SPI_EEPROM2_CS, HIGH );
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WRITE(SPI_FLASH_CS, HIGH );
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WRITE(SS_PIN, HIGH );
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#endif // MB(ALLIGATOR)
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PIO_Configure(
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void spiBegin() {
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g_APinDescription[SPI_PIN].pPort,
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if(spiInitMaded == false) {
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g_APinDescription[SPI_PIN].ulPinType,
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// Configure SPI pins
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g_APinDescription[SPI_PIN].ulPin,
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PIO_Configure(
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g_APinDescription[SPI_PIN].ulPinConfiguration);
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g_APinDescription[SCK_PIN].pPort,
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spiInit(1);
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g_APinDescription[SCK_PIN].ulPinType,
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spiInitMaded = true;
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g_APinDescription[SCK_PIN].ulPin,
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g_APinDescription[SCK_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MOSI_PIN].pPort,
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g_APinDescription[MOSI_PIN].ulPinType,
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g_APinDescription[MOSI_PIN].ulPin,
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g_APinDescription[MOSI_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MISO_PIN].pPort,
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g_APinDescription[MISO_PIN].ulPinType,
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g_APinDescription[MISO_PIN].ulPin,
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g_APinDescription[MISO_PIN].ulPinConfiguration);
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// set master mode, peripheral select, fault detection
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SPI_Configure(SPI0, ID_SPI0, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PS);
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SPI_Enable(SPI0);
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#if MB(ALLIGATOR)
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SET_OUTPUT(DAC0_SYNC);
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#if EXTRUDERS > 1
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SET_OUTPUT(DAC1_SYNC);
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WRITE(DAC1_SYNC, HIGH);
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#endif
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SET_OUTPUT(SPI_EEPROM1_CS);
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SET_OUTPUT(SPI_EEPROM2_CS);
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SET_OUTPUT(SPI_FLASH_CS);
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WRITE(DAC0_SYNC, HIGH);
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WRITE(SPI_EEPROM1_CS, HIGH );
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WRITE(SPI_EEPROM2_CS, HIGH );
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WRITE(SPI_FLASH_CS, HIGH );
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WRITE(SS_PIN, HIGH );
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#endif // MB(ALLIGATOR)
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OUT_WRITE(SDSS,0);
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PIO_Configure(
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g_APinDescription[SPI_PIN].pPort,
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g_APinDescription[SPI_PIN].ulPinType,
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g_APinDescription[SPI_PIN].ulPin,
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g_APinDescription[SPI_PIN].ulPinConfiguration);
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spiInit(1);
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spiInitMaded = true;
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}
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}
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}
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}
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void spiInit(uint8_t spiRate) {
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void spiInit(uint8_t spiRate) {
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if(spiInitMaded == false) {
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if(spiInitMaded == false) {
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if(spiRate > 6) spiRate = 1;
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if(spiRate > 6) spiRate = 1;
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#if MB(ALLIGATOR)
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// Set SPI mode 1, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_DAC,
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_EEPROM1, SPI_CSR_NCPHA |
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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#endif//MB(ALLIGATOR)
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#if MB(ALLIGATOR)
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// Set SPI mode 1, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_DAC,
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_EEPROM1, SPI_CSR_NCPHA |
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SPI_ConfigureNPCS(SPI0, SPI_CHAN, SPI_CSR_NCPHA |
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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SPI_CSR_DLYBCT(1));
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#endif//MB(ALLIGATOR)
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SPI_Enable(SPI0);
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spiInitMaded = true;
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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}
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SPI_ConfigureNPCS(SPI0, SPI_CHAN, SPI_CSR_NCPHA |
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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SPI_Enable(SPI0);
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spiInitMaded = true;
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}
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}
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}
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// Write single byte to SPI
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// Write single byte to SPI
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void spiSend(byte b) {
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void spiSend(byte b) {
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// write byte with address and end transmission flag
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// write byte with address and end transmission flag
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SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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// wait for transmit register empty
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// clear status
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SPI0->SPI_RDR;
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//delayMicroseconds(1U);
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}
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void spiSend(const uint8_t* buf, size_t n) {
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if (n == 0) return;
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for (size_t i = 0; i < n - 1; i++) {
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// clear status
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SPI0->SPI_RDR;
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SPI0->SPI_RDR;
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//delayMicroseconds(1U);
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//delayMicroseconds(1U);
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}
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}
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spiSend(buf[n - 1]);
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}
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void spiSend(uint32_t chan, byte b) {
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void spiSend(const uint8_t* buf, size_t n) {
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uint8_t dummy_read = 0;
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if (n == 0) return;
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// wait for transmit register empty
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for (size_t i = 0; i < n - 1; i++) {
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
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// write byte with address and end transmission flag
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(chan) | SPI_TDR_LASTXFER;
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// wait for receive register
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SPI0->SPI_RDR;
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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//delayMicroseconds(1U);
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// clear status
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}
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
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spiSend(buf[n - 1]);
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dummy_read = SPI0->SPI_RDR;
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}
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UNUSED(dummy_read);
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}
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void spiSend(uint32_t chan, const uint8_t* buf, size_t n) {
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void spiSend(uint32_t chan, byte b) {
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uint8_t dummy_read = 0;
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uint8_t dummy_read = 0;
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if (n == 0) return;
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// wait for transmit register empty
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for (int i = 0; i < (int)n - 1; i++) {
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||||
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(chan);
|
// write byte with address and end transmission flag
|
||||||
|
SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(chan) | SPI_TDR_LASTXFER;
|
||||||
|
// wait for receive register
|
||||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||||
|
// clear status
|
||||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
|
||||||
dummy_read = SPI0->SPI_RDR;
|
dummy_read = SPI0->SPI_RDR;
|
||||||
UNUSED(dummy_read);
|
UNUSED(dummy_read);
|
||||||
}
|
}
|
||||||
spiSend(chan, buf[n - 1]);
|
|
||||||
}
|
|
||||||
|
|
||||||
// Read single byte from SPI
|
void spiSend(uint32_t chan, const uint8_t* buf, size_t n) {
|
||||||
uint8_t spiRec() {
|
uint8_t dummy_read = 0;
|
||||||
// write dummy byte with address and end transmission flag
|
if (n == 0) return;
|
||||||
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
|
for (int i = 0; i < (int)n - 1; i++) {
|
||||||
// wait for transmit register empty
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||||
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(chan);
|
||||||
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||||
// wait for receive register
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
|
||||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
dummy_read = SPI0->SPI_RDR;
|
||||||
// get byte from receive register
|
UNUSED(dummy_read);
|
||||||
//delayMicroseconds(1U);
|
}
|
||||||
return SPI0->SPI_RDR;
|
spiSend(chan, buf[n - 1]);
|
||||||
}
|
|
||||||
|
|
||||||
uint8_t spiRec(uint32_t chan) {
|
|
||||||
uint8_t spirec_tmp;
|
|
||||||
// wait for transmit register empty
|
|
||||||
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
|
||||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
|
|
||||||
spirec_tmp = SPI0->SPI_RDR;
|
|
||||||
UNUSED(spirec_tmp);
|
|
||||||
|
|
||||||
// write dummy byte with address and end transmission flag
|
|
||||||
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER;
|
|
||||||
|
|
||||||
// wait for receive register
|
|
||||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
|
||||||
// get byte from receive register
|
|
||||||
return SPI0->SPI_RDR;
|
|
||||||
}
|
|
||||||
|
|
||||||
// Read from SPI into buffer
|
|
||||||
void spiRead(uint8_t*buf, uint16_t nbyte) {
|
|
||||||
if (nbyte-- == 0) return;
|
|
||||||
|
|
||||||
for (int i = 0; i < nbyte; i++) {
|
|
||||||
//while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
|
||||||
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN);
|
|
||||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
|
||||||
buf[i] = SPI0->SPI_RDR;
|
|
||||||
//delayMicroseconds(1U);
|
|
||||||
}
|
}
|
||||||
buf[nbyte] = spiRec();
|
|
||||||
}
|
|
||||||
|
|
||||||
// Write from buffer to SPI
|
// Read single byte from SPI
|
||||||
void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
uint8_t spiRec() {
|
||||||
SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN);
|
// write dummy byte with address and end transmission flag
|
||||||
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
|
||||||
//while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
// wait for transmit register empty
|
||||||
//SPI0->SPI_RDR;
|
|
||||||
for (int i = 0; i < 511; i++) {
|
|
||||||
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
|
|
||||||
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||||
|
|
||||||
|
// wait for receive register
|
||||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||||
SPI0->SPI_RDR;
|
// get byte from receive register
|
||||||
//delayMicroseconds(1U);
|
//delayMicroseconds(1U);
|
||||||
|
return SPI0->SPI_RDR;
|
||||||
}
|
}
|
||||||
spiSend(buf[511]);
|
|
||||||
}
|
|
||||||
|
|
||||||
/** Begin SPI transaction, set clock, bit order, data mode */
|
uint8_t spiRec(uint32_t chan) {
|
||||||
void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
|
uint8_t spirec_tmp;
|
||||||
// TODO: to be implemented
|
// wait for transmit register empty
|
||||||
}
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||||
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
|
||||||
|
spirec_tmp = SPI0->SPI_RDR;
|
||||||
|
UNUSED(spirec_tmp);
|
||||||
|
|
||||||
|
// write dummy byte with address and end transmission flag
|
||||||
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER;
|
||||||
|
|
||||||
|
// wait for receive register
|
||||||
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||||
|
// get byte from receive register
|
||||||
|
return SPI0->SPI_RDR;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Read from SPI into buffer
|
||||||
|
void spiRead(uint8_t*buf, uint16_t nbyte) {
|
||||||
|
if (nbyte-- == 0) return;
|
||||||
|
|
||||||
|
for (int i = 0; i < nbyte; i++) {
|
||||||
|
//while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||||
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN);
|
||||||
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||||
|
buf[i] = SPI0->SPI_RDR;
|
||||||
|
//delayMicroseconds(1U);
|
||||||
|
}
|
||||||
|
buf[nbyte] = spiRec();
|
||||||
|
}
|
||||||
|
|
||||||
|
// Write from buffer to SPI
|
||||||
|
void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
||||||
|
SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN);
|
||||||
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||||
|
//while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||||
|
//SPI0->SPI_RDR;
|
||||||
|
for (int i = 0; i < 511; i++) {
|
||||||
|
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
|
||||||
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||||
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||||
|
SPI0->SPI_RDR;
|
||||||
|
//delayMicroseconds(1U);
|
||||||
|
}
|
||||||
|
spiSend(buf[511]);
|
||||||
|
}
|
||||||
|
|
||||||
|
/** Begin SPI transaction, set clock, bit order, data mode */
|
||||||
|
void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
|
||||||
|
// TODO: to be implemented
|
||||||
|
}
|
||||||
|
|
||||||
|
#else // U8G compatible hardware SPI
|
||||||
|
|
||||||
|
void spiInit(uint8_t spiRate = 6 ) { // default to slowest rate if not specified)
|
||||||
|
// 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
|
||||||
|
int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
|
||||||
|
if(spiRate > 6) spiRate = 1;
|
||||||
|
|
||||||
|
/* enable PIOA and SPI0 */
|
||||||
|
REG_PMC_PCER0 = (1UL << ID_PIOA) | (1UL << ID_SPI0);
|
||||||
|
|
||||||
|
/* disable PIO on A26 and A27 */
|
||||||
|
REG_PIOA_PDR = 0x0c000000;
|
||||||
|
OUT_WRITE(SDSS, 1);
|
||||||
|
|
||||||
|
/* reset SPI0 (from sam lib) */
|
||||||
|
SPI0->SPI_CR = SPI_CR_SPIDIS;
|
||||||
|
SPI0->SPI_CR = SPI_CR_SWRST;
|
||||||
|
SPI0->SPI_CR = SPI_CR_SWRST;
|
||||||
|
SPI0->SPI_CR = SPI_CR_SPIEN;
|
||||||
|
|
||||||
|
|
||||||
|
/* master mode, no fault detection, chip select 0 */
|
||||||
|
SPI0->SPI_MR = SPI_MR_MSTR | SPI_MR_PCSDEC | SPI_MR_MODFDIS;
|
||||||
|
|
||||||
|
/* SPI mode 0, 8 Bit data transfer, baud rate */
|
||||||
|
SPI0->SPI_CSR[0] = SPI_CSR_SCBR(spiDueDividors[spiRate]) | 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint8_t spiTransfer(uint8_t data) {
|
||||||
|
|
||||||
|
/* wait until tx register is empty */
|
||||||
|
while( (SPI0->SPI_SR & SPI_SR_TDRE) == 0 );
|
||||||
|
/* send data */
|
||||||
|
SPI0->SPI_TDR = (uint32_t)data; // | SPI_PCS(0xF);
|
||||||
|
|
||||||
|
// wait for transmit register empty
|
||||||
|
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||||
|
|
||||||
|
// wait for receive register
|
||||||
|
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||||
|
// get byte from receive register
|
||||||
|
return SPI0->SPI_RDR;
|
||||||
|
}
|
||||||
|
|
||||||
|
void spiBegin() {
|
||||||
|
spiInit();
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t spiRec() {
|
||||||
|
uint8_t data = spiTransfer(0xff);
|
||||||
|
return data;
|
||||||
|
}
|
||||||
|
|
||||||
|
void spiRead(uint8_t*buf, uint16_t nbyte) {
|
||||||
|
if (nbyte == 0) return;
|
||||||
|
for (int i = 0; i < nbyte; i++) {
|
||||||
|
buf[i] = spiTransfer(0xff);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void spiSend(uint8_t data) {
|
||||||
|
spiTransfer(data);
|
||||||
|
}
|
||||||
|
|
||||||
|
void spiSend(const uint8_t* buf, size_t n) {
|
||||||
|
if (n == 0) return;
|
||||||
|
for (uint16_t i = 0; i < n; i++)
|
||||||
|
spiTransfer(buf[i]);
|
||||||
|
}
|
||||||
|
|
||||||
|
void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
||||||
|
spiTransfer(token);
|
||||||
|
for (uint16_t i = 0; i < 512; i++)
|
||||||
|
spiTransfer(buf[i]);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif //MB(ALLIGATOR)
|
||||||
#endif // ENABLED(SOFTWARE_SPI)
|
#endif // ENABLED(SOFTWARE_SPI)
|
||||||
|
|
||||||
#endif // ARDUINO_ARCH_SAM
|
#endif // ARDUINO_ARCH_SAM
|
||||||
|
|
|
||||||
163
Marlin/src/HAL/HAL_DUE/u8g_com_HAL_DUE_shared_hw_spi.cpp
Normal file
163
Marlin/src/HAL/HAL_DUE/u8g_com_HAL_DUE_shared_hw_spi.cpp
Normal file
|
|
@ -0,0 +1,163 @@
|
||||||
|
/**
|
||||||
|
* Marlin 3D Printer Firmware
|
||||||
|
* Copyright (C) 2016, 2017, 2018 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||||
|
*
|
||||||
|
* Based on Sprinter and grbl.
|
||||||
|
* Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
|
||||||
|
*
|
||||||
|
* This program is free software: you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation, either version 3 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
|
||||||
|
based on u8g_com_msp430_hw_spi.c
|
||||||
|
|
||||||
|
Universal 8bit Graphics Library
|
||||||
|
|
||||||
|
Copyright (c) 2012, olikraus@gmail.com
|
||||||
|
All rights reserved.
|
||||||
|
|
||||||
|
Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
are permitted provided that the following conditions are met:
|
||||||
|
|
||||||
|
* Redistributions of source code must retain the above copyright notice, this list
|
||||||
|
of conditions and the following disclaimer.
|
||||||
|
|
||||||
|
* Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
|
list of conditions and the following disclaimer in the documentation and/or other
|
||||||
|
materials provided with the distribution.
|
||||||
|
|
||||||
|
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
|
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
|
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
|
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
|
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
|
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
|
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef __SAM3X8E__
|
||||||
|
|
||||||
|
// #include <inttypes.h>
|
||||||
|
|
||||||
|
// #include "src/core/macros.h"
|
||||||
|
// #include "Configuration.h"
|
||||||
|
#include "../../Marlin.h"
|
||||||
|
#include "../../inc/MarlinConfig.h"
|
||||||
|
|
||||||
|
#include <U8glib.h>
|
||||||
|
|
||||||
|
#define SPI_FULL_SPEED 0
|
||||||
|
#define SPI_HALF_SPEED 1
|
||||||
|
#define SPI_QUARTER_SPEED 2
|
||||||
|
#define SPI_EIGHTH_SPEED 3
|
||||||
|
#define SPI_SIXTEENTH_SPEED 4
|
||||||
|
#define SPI_SPEED_5 5
|
||||||
|
#define SPI_SPEED_6 6
|
||||||
|
|
||||||
|
void spiBegin();
|
||||||
|
void spiInit(uint8_t spiRate);
|
||||||
|
void spiSend(uint8_t b);
|
||||||
|
void spiSend(const uint8_t* buf, size_t n);
|
||||||
|
|
||||||
|
#include <Arduino.h>
|
||||||
|
#include "../../core/macros.h"
|
||||||
|
#include "fastio_Due.h"
|
||||||
|
|
||||||
|
|
||||||
|
void u8g_SetPIOutput_DUE_hw_spi(u8g_t *u8g, uint8_t pin_index) {
|
||||||
|
PIO_Configure(g_APinDescription[u8g->pin_list[pin_index]].pPort, PIO_OUTPUT_1,
|
||||||
|
g_APinDescription[u8g->pin_list[pin_index]].ulPin, g_APinDescription[u8g->pin_list[pin_index]].ulPinConfiguration); // OUTPUT
|
||||||
|
}
|
||||||
|
|
||||||
|
void u8g_SetPILevel_DUE_hw_spi(u8g_t *u8g, uint8_t pin_index, uint8_t level) {
|
||||||
|
volatile Pio* port = g_APinDescription[u8g->pin_list[pin_index]].pPort;
|
||||||
|
uint32_t mask = g_APinDescription[u8g->pin_list[pin_index]].ulPin;
|
||||||
|
if (level) port->PIO_SODR = mask;
|
||||||
|
else port->PIO_CODR = mask;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t u8g_com_HAL_DUE_shared_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
|
||||||
|
{
|
||||||
|
switch(msg)
|
||||||
|
{
|
||||||
|
case U8G_COM_MSG_STOP:
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_INIT:
|
||||||
|
u8g_SetPILevel_DUE_hw_spi(u8g, U8G_PI_CS, 1);
|
||||||
|
u8g_SetPILevel_DUE_hw_spi(u8g, U8G_PI_A0, 1);
|
||||||
|
|
||||||
|
u8g_SetPIOutput_DUE_hw_spi(u8g, U8G_PI_CS);
|
||||||
|
u8g_SetPIOutput_DUE_hw_spi(u8g, U8G_PI_A0);
|
||||||
|
|
||||||
|
u8g_Delay(5);
|
||||||
|
|
||||||
|
spiBegin();
|
||||||
|
|
||||||
|
#ifndef SPI_SPEED
|
||||||
|
#define SPI_SPEED SPI_FULL_SPEED // use same SPI speed as SD card
|
||||||
|
#endif
|
||||||
|
spiInit(2);
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
|
||||||
|
u8g_SetPILevel_DUE_hw_spi(u8g, U8G_PI_A0, arg_val);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_CHIP_SELECT:
|
||||||
|
u8g_SetPILevel_DUE_hw_spi(u8g, U8G_PI_CS, (arg_val ? 0 : 1));
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_RESET:
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_WRITE_BYTE:
|
||||||
|
|
||||||
|
spiSend((uint8_t)arg_val);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_WRITE_SEQ: {
|
||||||
|
uint8_t *ptr = (uint8_t*) arg_ptr;
|
||||||
|
while (arg_val > 0) {
|
||||||
|
spiSend(*ptr++);
|
||||||
|
arg_val--;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case U8G_COM_MSG_WRITE_SEQ_P: {
|
||||||
|
uint8_t *ptr = (uint8_t*) arg_ptr;
|
||||||
|
while (arg_val > 0) {
|
||||||
|
spiSend(*ptr++);
|
||||||
|
arg_val--;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif //__SAM3X8E__
|
||||||
|
|
@ -125,7 +125,7 @@
|
||||||
*
|
*
|
||||||
* :[-1, 0, 1, 2, 3, 4, 5, 6, 7]
|
* :[-1, 0, 1, 2, 3, 4, 5, 6, 7]
|
||||||
*/
|
*/
|
||||||
#define SERIAL_PORT 0
|
#define SERIAL_PORT -1
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Select a secondary serial port on the board to use for communication with the host.
|
* Select a secondary serial port on the board to use for communication with the host.
|
||||||
|
|
@ -134,7 +134,7 @@
|
||||||
*
|
*
|
||||||
* :[-1, 0, 1, 2, 3, 4, 5, 6, 7]
|
* :[-1, 0, 1, 2, 3, 4, 5, 6, 7]
|
||||||
*/
|
*/
|
||||||
#define SERIAL_PORT_2 -1
|
#define SERIAL_PORT_2 0
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* This setting determines the communication speed of the printer.
|
* This setting determines the communication speed of the printer.
|
||||||
|
|
|
||||||
|
|
@ -517,7 +517,7 @@ void advance_command_queue() {
|
||||||
card.closefile();
|
card.closefile();
|
||||||
SERIAL_PROTOCOLLNPGM(MSG_FILE_SAVED);
|
SERIAL_PROTOCOLLNPGM(MSG_FILE_SAVED);
|
||||||
|
|
||||||
#ifndef USBCON
|
#if !defined(__AVR__) || !defined(USBCON)
|
||||||
#if ENABLED(SERIAL_STATS_DROPPED_RX)
|
#if ENABLED(SERIAL_STATS_DROPPED_RX)
|
||||||
SERIAL_ECHOLNPAIR("Dropped bytes: ", customizedSerial.dropped());
|
SERIAL_ECHOLNPAIR("Dropped bytes: ", customizedSerial.dropped());
|
||||||
#endif
|
#endif
|
||||||
|
|
@ -525,7 +525,7 @@ void advance_command_queue() {
|
||||||
#if ENABLED(SERIAL_STATS_MAX_RX_QUEUED)
|
#if ENABLED(SERIAL_STATS_MAX_RX_QUEUED)
|
||||||
SERIAL_ECHOLNPAIR("Max RX Queue Size: ", customizedSerial.rxMaxEnqueued());
|
SERIAL_ECHOLNPAIR("Max RX Queue Size: ", customizedSerial.rxMaxEnqueued());
|
||||||
#endif
|
#endif
|
||||||
#endif // !USBCON
|
#endif // !defined(__AVR__) || !defined(USBCON)
|
||||||
|
|
||||||
ok_to_send();
|
ok_to_send();
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -28,7 +28,7 @@
|
||||||
#ifndef CONDITIONALS_ADV_H
|
#ifndef CONDITIONALS_ADV_H
|
||||||
#define CONDITIONALS_ADV_H
|
#define CONDITIONALS_ADV_H
|
||||||
|
|
||||||
#ifndef USBCON
|
#if !defined(__AVR__) || !defined(USBCON)
|
||||||
// Define constants and variables for buffering serial data.
|
// Define constants and variables for buffering serial data.
|
||||||
// Use only 0 or powers of 2 greater than 1
|
// Use only 0 or powers of 2 greater than 1
|
||||||
// : [0, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, ...]
|
// : [0, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, ...]
|
||||||
|
|
|
||||||
|
|
@ -275,7 +275,7 @@
|
||||||
/**
|
/**
|
||||||
* Serial
|
* Serial
|
||||||
*/
|
*/
|
||||||
#ifndef USBCON
|
#if !defined(__AVR__) || !defined(USBCON)
|
||||||
#if ENABLED(SERIAL_XON_XOFF) && RX_BUFFER_SIZE < 1024
|
#if ENABLED(SERIAL_XON_XOFF) && RX_BUFFER_SIZE < 1024
|
||||||
#error "SERIAL_XON_XOFF requires RX_BUFFER_SIZE >= 1024 for reliable transfers without drops."
|
#error "SERIAL_XON_XOFF requires RX_BUFFER_SIZE >= 1024 for reliable transfers without drops."
|
||||||
#elif RX_BUFFER_SIZE && (RX_BUFFER_SIZE < 2 || !IS_POWER_OF_2(RX_BUFFER_SIZE))
|
#elif RX_BUFFER_SIZE && (RX_BUFFER_SIZE < 2 || !IS_POWER_OF_2(RX_BUFFER_SIZE))
|
||||||
|
|
@ -1308,7 +1308,7 @@ static_assert(1 >= 0
|
||||||
/**
|
/**
|
||||||
* emergency-command parser
|
* emergency-command parser
|
||||||
*/
|
*/
|
||||||
#if ENABLED(EMERGENCY_PARSER) && defined(USBCON)
|
#if ENABLED(EMERGENCY_PARSER) && defined(__AVR__) && defined(USBCON)
|
||||||
#error "EMERGENCY_PARSER does not work on boards with AT90USB processors (USBCON)."
|
#error "EMERGENCY_PARSER does not work on boards with AT90USB processors (USBCON)."
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
||||||
189
Marlin/src/lcd/dogm/u8g_dev_uc1701_mini12864_HAL.cpp
Normal file
189
Marlin/src/lcd/dogm/u8g_dev_uc1701_mini12864_HAL.cpp
Normal file
|
|
@ -0,0 +1,189 @@
|
||||||
|
/**
|
||||||
|
* Marlin 3D Printer Firmware
|
||||||
|
* Copyright (C) 2016, 2017, 2018 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
||||||
|
*
|
||||||
|
* Based on Sprinter and grbl.
|
||||||
|
* Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
|
||||||
|
*
|
||||||
|
* This program is free software: you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation, either version 3 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
|
||||||
|
based on u8g_dev_uc1701_mini12864_HAL.c (dealextreme)
|
||||||
|
|
||||||
|
Universal 8bit Graphics Library
|
||||||
|
|
||||||
|
Copyright (c) 2011, olikraus@gmail.com
|
||||||
|
All rights reserved.
|
||||||
|
|
||||||
|
Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
are permitted provided that the following conditions are met:
|
||||||
|
|
||||||
|
* Redistributions of source code must retain the above copyright notice, this list
|
||||||
|
of conditions and the following disclaimer.
|
||||||
|
|
||||||
|
* Redistributions in binary form must reproduce the above copyright notice, this
|
||||||
|
list of conditions and the following disclaimer in the documentation and/or other
|
||||||
|
materials provided with the distribution.
|
||||||
|
|
||||||
|
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||||
|
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
|
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
||||||
|
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
|
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||||
|
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||||
|
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
|
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||||
|
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
|
||||||
|
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "../../inc/MarlinConfig.h"
|
||||||
|
|
||||||
|
#if ENABLED(DOGLCD)
|
||||||
|
|
||||||
|
#include <U8glib.h>
|
||||||
|
|
||||||
|
#include "HAL_LCD_com_defines.h"
|
||||||
|
|
||||||
|
#define WIDTH 128
|
||||||
|
#define HEIGHT 64
|
||||||
|
#define PAGE_HEIGHT 8
|
||||||
|
|
||||||
|
static const uint8_t u8g_dev_uc1701_mini12864_HAL_init_seq[] PROGMEM = {
|
||||||
|
U8G_ESC_CS(0), /* disable chip */
|
||||||
|
U8G_ESC_ADR(0), /* instruction mode */
|
||||||
|
U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
|
||||||
|
U8G_ESC_CS(1), /* enable chip */
|
||||||
|
|
||||||
|
0x0e2, /* soft reset */
|
||||||
|
0x040, /* set display start line to 0 */
|
||||||
|
0x0a0, /* ADC set to reverse */
|
||||||
|
0x0c8, /* common output mode */
|
||||||
|
0x0a6, /* display normal, bit val 0: LCD pixel off. */
|
||||||
|
0x0a2, /* LCD bias 1/9 */
|
||||||
|
0x02f, /* all power control circuits on */
|
||||||
|
0x0f8, /* set booster ratio to */
|
||||||
|
0x000, /* 4x */
|
||||||
|
0x023, /* set V0 voltage resistor ratio to large */
|
||||||
|
0x081, /* set contrast */
|
||||||
|
0x027, /* contrast value */
|
||||||
|
0x0ac, /* indicator */
|
||||||
|
0x000, /* disable */
|
||||||
|
0x0af, /* display on */
|
||||||
|
|
||||||
|
U8G_ESC_DLY(100), /* delay 100 ms */
|
||||||
|
0x0a5, /* display all points, ST7565 */
|
||||||
|
U8G_ESC_DLY(100), /* delay 100 ms */
|
||||||
|
U8G_ESC_DLY(100), /* delay 100 ms */
|
||||||
|
0x0a4, /* normal display */
|
||||||
|
U8G_ESC_CS(0), /* disable chip */
|
||||||
|
U8G_ESC_END /* end of sequence */
|
||||||
|
};
|
||||||
|
|
||||||
|
static const uint8_t u8g_dev_uc1701_mini12864_HAL_data_start[] PROGMEM = {
|
||||||
|
U8G_ESC_ADR(0), /* instruction mode */
|
||||||
|
U8G_ESC_CS(1), /* enable chip */
|
||||||
|
0x010, /* set upper 4 bit of the col adr to 0 */
|
||||||
|
0x000, /* set lower 4 bit of the col adr to 4 */
|
||||||
|
U8G_ESC_END /* end of sequence */
|
||||||
|
};
|
||||||
|
|
||||||
|
uint8_t u8g_dev_uc1701_mini12864_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
|
||||||
|
{
|
||||||
|
switch(msg)
|
||||||
|
{
|
||||||
|
case U8G_DEV_MSG_INIT:
|
||||||
|
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
|
||||||
|
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_init_seq);
|
||||||
|
break;
|
||||||
|
case U8G_DEV_MSG_STOP:
|
||||||
|
break;
|
||||||
|
case U8G_DEV_MSG_PAGE_NEXT:
|
||||||
|
{
|
||||||
|
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
|
||||||
|
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_data_start);
|
||||||
|
u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page */
|
||||||
|
u8g_SetAddress(u8g, dev, 1); /* data mode */
|
||||||
|
if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
|
||||||
|
return 0;
|
||||||
|
u8g_SetChipSelect(u8g, dev, 0);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case U8G_DEV_MSG_CONTRAST:
|
||||||
|
u8g_SetChipSelect(u8g, dev, 1);
|
||||||
|
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
|
||||||
|
u8g_WriteByte(u8g, dev, 0x081);
|
||||||
|
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
|
||||||
|
u8g_SetChipSelect(u8g, dev, 0);
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t u8g_dev_uc1701_mini12864_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
|
||||||
|
{
|
||||||
|
switch(msg)
|
||||||
|
{
|
||||||
|
case U8G_DEV_MSG_INIT:
|
||||||
|
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
|
||||||
|
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_init_seq);
|
||||||
|
break;
|
||||||
|
case U8G_DEV_MSG_STOP:
|
||||||
|
break;
|
||||||
|
case U8G_DEV_MSG_PAGE_NEXT:
|
||||||
|
{
|
||||||
|
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
|
||||||
|
|
||||||
|
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_data_start);
|
||||||
|
u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page)); /* select current page */
|
||||||
|
u8g_SetAddress(u8g, dev, 1); /* data mode */
|
||||||
|
u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)pb->buf);
|
||||||
|
u8g_SetChipSelect(u8g, dev, 0);
|
||||||
|
|
||||||
|
u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_data_start);
|
||||||
|
u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page+1)); /* select current page */
|
||||||
|
u8g_SetAddress(u8g, dev, 1); /* data mode */
|
||||||
|
u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width);
|
||||||
|
u8g_SetChipSelect(u8g, dev, 0);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case U8G_DEV_MSG_CONTRAST:
|
||||||
|
u8g_SetChipSelect(u8g, dev, 1);
|
||||||
|
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
|
||||||
|
u8g_WriteByte(u8g, dev, 0x081);
|
||||||
|
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
|
||||||
|
u8g_SetChipSelect(u8g, dev, 0);
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
|
||||||
|
}
|
||||||
|
|
||||||
|
U8G_PB_DEV(u8g_dev_uc1701_mini12864_HAL_sw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1701_mini12864_HAL_fn, U8G_COM_HAL_SW_SPI_FN);
|
||||||
|
U8G_PB_DEV(u8g_dev_uc1701_mini12864_HAL_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1701_mini12864_HAL_fn, U8G_COM_HAL_HW_SPI_FN);
|
||||||
|
|
||||||
|
uint8_t u8g_dev_uc1701_mini12864_HAL_2x_buf[WIDTH*2] U8G_NOCOMMON ;
|
||||||
|
u8g_pb_t u8g_dev_uc1701_mini12864_HAL_2x_pb = { {16, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_uc1701_mini12864_HAL_2x_buf};
|
||||||
|
u8g_dev_t u8g_dev_uc1701_mini12864_HAL_2x_sw_spi = { u8g_dev_uc1701_mini12864_HAL_2x_fn, &u8g_dev_uc1701_mini12864_HAL_2x_pb, U8G_COM_HAL_SW_SPI_FN };
|
||||||
|
u8g_dev_t u8g_dev_uc1701_mini12864_HAL_2x_hw_spi = { u8g_dev_uc1701_mini12864_HAL_2x_fn, &u8g_dev_uc1701_mini12864_HAL_2x_pb, U8G_COM_HAL_HW_SPI_FN };
|
||||||
|
|
||||||
|
#endif // DOGLCD
|
||||||
|
|
@ -156,5 +156,16 @@
|
||||||
#define BTN_ENC 37
|
#define BTN_ENC 37
|
||||||
|
|
||||||
#define BEEPER_PIN -1
|
#define BEEPER_PIN -1
|
||||||
|
|
||||||
|
#elif ENABLED(MINIPANEL)
|
||||||
|
#define BTN_EN1 52
|
||||||
|
#define BTN_EN2 50
|
||||||
|
#define BTN_ENC 48
|
||||||
|
#define LCD_SDSS 4
|
||||||
|
#define SD_DETECT_PIN 14
|
||||||
|
#define BEEPER_PIN 41
|
||||||
|
#define DOGLCD_A0 46
|
||||||
|
#define DOGLCD_CS 45
|
||||||
|
|
||||||
#endif // SPARK_FULL_GRAPHICS
|
#endif // SPARK_FULL_GRAPHICS
|
||||||
#endif // ULTRA_LCD
|
#endif // ULTRA_LCD
|
||||||
|
|
|
||||||
|
|
@ -125,7 +125,7 @@
|
||||||
#define HEATER_0_PIN 9
|
#define HEATER_0_PIN 9
|
||||||
#define HEATER_1_PIN 10
|
#define HEATER_1_PIN 10
|
||||||
#define HEATER_2_PIN 11
|
#define HEATER_2_PIN 11
|
||||||
#define HEATER_BED_PIN 8 // BED
|
#define HEATER_BED_PIN 8
|
||||||
|
|
||||||
#define FAN_PIN 12
|
#define FAN_PIN 12
|
||||||
#define CONTROLLER_FAN_PIN -1
|
#define CONTROLLER_FAN_PIN -1
|
||||||
|
|
@ -140,23 +140,58 @@
|
||||||
// LCD / Controller
|
// LCD / Controller
|
||||||
//
|
//
|
||||||
#if ENABLED(ULTRA_LCD)
|
#if ENABLED(ULTRA_LCD)
|
||||||
|
// ramps-fd lcd adaptor
|
||||||
|
|
||||||
|
|
||||||
|
#define BEEPER_PIN 37
|
||||||
|
#define BTN_EN1 33
|
||||||
|
#define BTN_EN2 31
|
||||||
|
#define BTN_ENC 35
|
||||||
|
#define SD_DETECT_PIN 49
|
||||||
|
|
||||||
|
|
||||||
#if ENABLED(NEWPANEL)
|
#if ENABLED(NEWPANEL)
|
||||||
// ramps-fd lcd adaptor
|
|
||||||
#define LCD_PINS_RS 16
|
#define LCD_PINS_RS 16
|
||||||
#define LCD_PINS_ENABLE 17
|
#define LCD_PINS_ENABLE 17
|
||||||
#define LCD_PINS_D4 23
|
#define LCD_PINS_D4 23
|
||||||
#define LCD_PINS_D5 25
|
#define LCD_PINS_D5 25
|
||||||
#define LCD_PINS_D6 27
|
#define LCD_PINS_D6 27
|
||||||
#define LCD_PINS_D7 29
|
#define LCD_PINS_D7 29
|
||||||
|
#endif
|
||||||
|
|
||||||
#if ENABLED(REPRAP_DISCOUNT_SMART_CONTROLLER)
|
#if ENABLED(MINIPANEL)
|
||||||
#define BEEPER_PIN 37
|
#define DOGLCD_CS 25
|
||||||
|
#define DOGLCD_A0 27
|
||||||
#define BTN_EN1 33
|
|
||||||
#define BTN_EN2 31
|
|
||||||
#define BTN_ENC 35
|
|
||||||
|
|
||||||
#define SD_DETECT_PIN 49
|
|
||||||
#endif
|
|
||||||
#endif
|
#endif
|
||||||
#endif // ULTRA_LCD
|
#endif // ULTRA_LCD
|
||||||
|
|
||||||
|
#if ENABLED(HAVE_TMC2208)
|
||||||
|
/**
|
||||||
|
* TMC2208 stepper drivers
|
||||||
|
*
|
||||||
|
* Hardware serial communication ports.
|
||||||
|
* If undefined software serial is used according to the pins below
|
||||||
|
*/
|
||||||
|
//#define X_HARDWARE_SERIAL Serial1
|
||||||
|
//#define X2_HARDWARE_SERIAL Serial1
|
||||||
|
//#define Y_HARDWARE_SERIAL Serial1
|
||||||
|
//#define Y2_HARDWARE_SERIAL Serial1
|
||||||
|
//#define Z_HARDWARE_SERIAL Serial1
|
||||||
|
//#define Z2_HARDWARE_SERIAL Serial1
|
||||||
|
//#define E0_HARDWARE_SERIAL Serial1
|
||||||
|
//#define E1_HARDWARE_SERIAL Serial1
|
||||||
|
//#define E2_HARDWARE_SERIAL Serial1
|
||||||
|
//#define E3_HARDWARE_SERIAL Serial1
|
||||||
|
//#define E4_HARDWARE_SERIAL Serial1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// M3/M4/M5 - Spindle/Laser Control
|
||||||
|
//
|
||||||
|
#if ENABLED(SPINDLE_LASER_ENABLE) && !PIN_EXISTS(SPINDLE_LASER_ENABLE)
|
||||||
|
#if HOTENDS < 3
|
||||||
|
#define SPINDLE_LASER_ENABLE_PIN 45 // Use E2 ENA
|
||||||
|
#define SPINDLE_LASER_PWM_PIN 12 // MUST BE HARDWARE PWM
|
||||||
|
#define SPINDLE_DIR_PIN 47 // Use E2 DIR
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -36,3 +36,11 @@
|
||||||
#undef INVERTED_FAN_PINS
|
#undef INVERTED_FAN_PINS
|
||||||
|
|
||||||
#define I2C_EEPROM
|
#define I2C_EEPROM
|
||||||
|
|
||||||
|
#ifndef PS_ON_PIN
|
||||||
|
#define PS_ON_PIN 12
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef FILWIDTH_PIN
|
||||||
|
#define FILWIDTH_PIN 5 // Analog Input on AUX2
|
||||||
|
#endif
|
||||||
|
|
|
||||||
Reference in a new issue