From ec13aa0dc122c5c601fa68e9e06bc7477b1ee228 Mon Sep 17 00:00:00 2001 From: Scott Lahteine Date: Thu, 18 Jul 2019 05:13:01 -0500 Subject: [PATCH] Misc. whitespace --- Marlin/src/HAL/HAL_ESP32/HAL.cpp | 1 - .../BIGTREE_GENERIC_STM32F407_5X/ldscript.ld | 19 +++++++++---------- .../BIGTREE_GENERIC_STM32F407_5X/variant.h | 2 +- 3 files changed, 10 insertions(+), 12 deletions(-) diff --git a/Marlin/src/HAL/HAL_ESP32/HAL.cpp b/Marlin/src/HAL/HAL_ESP32/HAL.cpp index 907b3a985..ef59b6f12 100644 --- a/Marlin/src/HAL/HAL_ESP32/HAL.cpp +++ b/Marlin/src/HAL/HAL_ESP32/HAL.cpp @@ -177,7 +177,6 @@ void HAL_adc_init() { // Calculate ADC characteristics (i.e., gain and offset factors for each attenuation level) for (int i = 0; i < ADC_ATTEN_MAX; i++) { esp_adc_cal_characterize(ADC_UNIT_1, (adc_atten_t)i, ADC_WIDTH_BIT_12, V_REF, &characteristics[i]); - // Change attenuation 100mV below the calibrated threshold thresholds[i] = esp_adc_cal_raw_to_voltage(4095, &characteristics[i]); } diff --git a/buildroot/share/PlatformIO/variants/BIGTREE_GENERIC_STM32F407_5X/ldscript.ld b/buildroot/share/PlatformIO/variants/BIGTREE_GENERIC_STM32F407_5X/ldscript.ld index a6052deb8..f92e3eeaa 100644 --- a/buildroot/share/PlatformIO/variants/BIGTREE_GENERIC_STM32F407_5X/ldscript.ld +++ b/buildroot/share/PlatformIO/variants/BIGTREE_GENERIC_STM32F407_5X/ldscript.ld @@ -134,7 +134,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -147,24 +147,24 @@ SECTIONS _siccmram = LOADADDR(.ccmram); - /* CCM-RAM section - * - * IMPORTANT NOTE! - * If initialized variables will be placed in this section, - * the startup code needs to be modified to copy the init-values. - */ + /* CCM-RAM section + * + * IMPORTANT NOTE! + * If initialized variables will be placed in this section, + * the startup code needs to be modified to copy the init-values. + */ .ccmram : { . = ALIGN(4); _sccmram = .; /* create a global symbol at ccmram start */ *(.ccmram) *(.ccmram*) - + . = ALIGN(4); _eccmram = .; /* create a global symbol at ccmram end */ } >CCMRAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : @@ -192,7 +192,6 @@ SECTIONS . = ALIGN(4); } >RAM - /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/buildroot/share/PlatformIO/variants/BIGTREE_GENERIC_STM32F407_5X/variant.h b/buildroot/share/PlatformIO/variants/BIGTREE_GENERIC_STM32F407_5X/variant.h index d5d34f152..542f6c377 100644 --- a/buildroot/share/PlatformIO/variants/BIGTREE_GENERIC_STM32F407_5X/variant.h +++ b/buildroot/share/PlatformIO/variants/BIGTREE_GENERIC_STM32F407_5X/variant.h @@ -135,7 +135,7 @@ extern const PinName digitalPin[]; #define PE15 64 //1:FSMC_D12 #define PD8 65 //1:FSMC_D13 / USART3_TX #define PD9 66 //1:FSMC_D14 / USART3_RX - #define PD10 67 //1:FSMC_D15 + #define PD10 67 //1:FSMC_D15 #define PD11 68 //1:FSMC_A16 #define PD12 69 //1:FSMC_A17 / TIM4_CH1 #define PD13 70 //1:FSMC_A18 / TIM4_CH2