[2.0.x] Miscellaneous fixes (#12039)

* Allow override of soft SPI pins in `pins_*.h`
* Add default case to avoid compiler warning.
* Additional pin definitions for Archim 2.
* Einsy Retro has same timings as Einsy Rambo.
This commit is contained in:
Marcio Teixeira 2018-10-08 17:14:52 -06:00 committed by Scott Lahteine
parent 906a24fa81
commit ec9aa4f468
4 changed files with 40 additions and 7 deletions

View file

@ -48,9 +48,15 @@
#else #else
// defaults // defaults
#define DUE_SOFTWARE_SPI #define DUE_SOFTWARE_SPI
#define SCK_PIN 52 #ifndef SCK_PIN
#define MISO_PIN 50 #define SCK_PIN 52
#define MOSI_PIN 51 #endif
#ifndef MISO_PIN
#define MISO_PIN 50
#endif
#ifndef MOSI_PIN
#define MOSI_PIN 51
#endif
#endif #endif
/* A.28, A.29, B.21, C.26, C.29 */ /* A.28, A.29, B.21, C.26, C.29 */

View file

@ -94,6 +94,7 @@ void ST7920_Lite_Status_Screen::write_number(const int16_t value, const uint8_t
case 3: fmt = PSTR("%3d"); break; case 3: fmt = PSTR("%3d"); break;
case 2: fmt = PSTR("%2d"); break; case 2: fmt = PSTR("%2d"); break;
case 1: fmt = PSTR("%1d"); break; case 1: fmt = PSTR("%1d"); break;
default: return;
} }
sprintf_P(str, fmt, value); sprintf_P(str, fmt, value);
write_str(str); write_str(str);

View file

@ -60,7 +60,7 @@
#define CPU_ST7920_DELAY_1 DELAY_NS(0) #define CPU_ST7920_DELAY_1 DELAY_NS(0)
#define CPU_ST7920_DELAY_2 DELAY_NS(188) #define CPU_ST7920_DELAY_2 DELAY_NS(188)
#define CPU_ST7920_DELAY_3 DELAY_NS(0) #define CPU_ST7920_DELAY_3 DELAY_NS(0)
#elif MB(MINIRAMBO) || MB(EINSY_RAMBO) #elif MB(MINIRAMBO) || MB(EINSY_RAMBO) || MB(EINSY_RETRO)
#define CPU_ST7920_DELAY_1 DELAY_NS(0) #define CPU_ST7920_DELAY_1 DELAY_NS(0)
#define CPU_ST7920_DELAY_2 DELAY_NS(250) #define CPU_ST7920_DELAY_2 DELAY_NS(250)
#define CPU_ST7920_DELAY_3 DELAY_NS(0) #define CPU_ST7920_DELAY_3 DELAY_NS(0)

View file

@ -50,6 +50,12 @@
#define E0_DIAG_PIN 78 // PB23 E1_DIAG #define E0_DIAG_PIN 78 // PB23 E1_DIAG
#define E1_DIAG_PIN 25 // PD0 E2_DIAG #define E1_DIAG_PIN 25 // PD0 E2_DIAG
//
// Servos
//
#define SERVO0_PIN 20 // D20 PB12 (Header J20 20)
#define SERVO1_PIN 21 // D21 PB13 (Header J20 19)
// //
// Limit Switches // Limit Switches
// //
@ -161,7 +167,27 @@
// //
// Misc. Functions // Misc. Functions
// //
#define SDSS 87 // D87 PA29 CS
// Internal MicroSD card reader on the PCB
#define INT_SCK_PIN 42 // D42 PA19/MCCK
#define INT_MISO_PIN 43 // D43 PA20/MCCDA
#define INT_MOSI_PIN 73 // D73 PA21/MCDA0
#define INT_SDSS 55 // D55 PA24/MCDA3
// The external SD card reader on SC2, as well as 2 Mbyte SPI Flash
#define SCK_PIN 76 // D76 PA27
#define MISO_PIN 74 // D74 PA25
#define MOSI_PIN 75 // D75 PA26
#define SDSS 87 // D87 PA29
#define SPI_FLASH_SS 52 // D52 PB21
// Filament runout sensor pins (or GPIO)
#ifndef FIL_RUNOUT_PIN
#define FIL_RUNOUT_PIN 66 // D66 PB15 (Header J20 15)
#endif
#ifndef FIL_RUNOUT2_PIN
#define FIL_RUNOUT2_PIN 67 // D67 PB16 (Header J20 16)
#endif
// //
// LCD / Controller // LCD / Controller
@ -182,5 +208,5 @@
#define BTN_EN1 60 // D60 PA3_TIOB1 #define BTN_EN1 60 // D60 PA3_TIOB1
#define BTN_EN2 13 // D13 PB27_TIOB0 #define BTN_EN2 13 // D13 PB27_TIOB0
#define BTN_ENC 16 // D16 PA13_TXD1 // the click #define BTN_ENC 16 // D16 PA13_TXD1 // the click
#endif // NEWPANEL #endif // NEWPANEL
#endif // ULTRA_LCD #endif // ULTRA_LCD || EXTENSIBLE_UI