Scott Lahteine
1f7e220387
Make HAL ISR macros function-like
2019-03-10 20:44:27 -05:00
Scott Lahteine
0feeef2604
Update copyright in headers
2019-02-12 15:30:11 -06:00
Scott Lahteine
f5eab912ed
Apply #pragma once, misc cleanup ( #12322 )
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* Apply #pragma once in headers
* Adjust some thermistors formatting
* Misc cleanup and formatting
2018-11-04 02:25:55 -06:00
Christopher Pepper
5ddf52d58e
[HAL][LPC176x] Pull out framework into separate repository
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Framework and build platform now located at https://github.com/p3p/pio-framework-arduino-lpc176x and https://github.com/p3p/pio-nxplpc-arduino-lpc176x respectively
fix mkssbase leds
move hardware serial
remove hardware/software serial
Hardware Serial extraction
HardwareSerial ISRs
fix disabled serial2 causing Serial object to link
move usb devices out to framework
separate out adc/pwm peripheral function from hal.cpp
fix includes
remove unused pwm init
move adc
HAL header update
templated filtered adc
LPC1769 platform
2018-10-14 18:43:48 +01:00
Scott Lahteine
6a3207391f
Remove obsolete HAL_timer_restrain
2018-08-31 16:17:22 -05:00
etagle
a215725df6
Fix stepper pulse timing
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Always honor minimum period on stepper pulse generation, and fix timing calculations
Signed-off-by: etagle <ejtagle@hotmail.com>
2018-06-12 21:34:24 -05:00
Scott Lahteine
4dbec774b5
HAL_*_TIMER_RATE => *_TIMER_RATE
2018-06-12 16:39:12 -05:00
etagle
0566badcef
Add memory barrier, optimal interrupt on-off
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Disabling an ISR on ARM has 3 instructions of latency. A Memory barrier is REQUIRED to ensure proper and predictable disabling. Memory barriers are expensive, so avoid disabling if already disabled (See https://mcuoneclipse.com/2015/10/16/nvic-disabling-interrupts-on-arm-cortex-m-and-the-need-for-a-memory-barrier-instruction/ )
2018-05-20 02:39:34 -05:00
Scott Lahteine
206014a957
Fix LPC176x timer functions
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Co-Authored-By: ejtagle <ejtagle@hotmail.com>
2018-05-20 01:58:51 -05:00
Scott Lahteine
37b15fe4cf
Reorder HAL timer header items
2018-05-13 16:50:39 -05:00
Eduardo José Tagle
0c428a66d9
Proper AVR preemptive interrupt handling ( #10496 )
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Also simplify logic on all ARM-based interrupts. Now, it is REQUIRED to properly configure interrupt priority. USART should have highest priority, followed by Stepper, and then all others.
2018-04-23 22:05:07 -05:00
Bob-the-Kuhn
3c58ca181c
[2.0.x] Correct step pulse width on LPC1768, DUE & Teensy35_36 ( #10016 )
2018-03-09 02:11:28 -06:00
Scott Lahteine
98d48fc731
Followup to HAL_timer_restrain
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Followup to #9985
2018-03-07 22:18:37 -06:00
Scott Lahteine
d45f19d385
Remove Unicode from var name
2018-03-07 19:08:44 -06:00
Chris Pepper
a1a88ebabc
HAL function to ensure min stepper interrupt interval ( #9985 )
2018-03-07 17:53:25 -06:00
Scott Lahteine
a810e585db
Drop HAL_timer_set_count
2018-02-20 03:10:39 -06:00
Scott Lahteine
03d790451f
[2.0.x] HAL timer set/get count => set/get compare ( #9581 )
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To reduce confusion over the current timer count vs. the compare (aka "top") value. Caution: this re-uses the function name, changing its meaning.
2018-02-10 20:42:00 -06:00
Scott Lahteine
ac368f2788
Add STEPPER_ISR_ENABLED() to HALs
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Some also get a `HAL_timer_interrupt_enabled` function.
2018-01-14 21:07:10 -06:00
Scott Lahteine
1c41de16d4
Trailing whitespace clean
2018-01-05 10:11:31 -06:00
Bob-the-Kuhn
5574fad69c
copy of PR #8991 code
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Formatting tweaks
correct array initialization & remove test code
2018-01-02 11:17:46 -06:00
Scott Lahteine
6149b82119
Allow setting current timer counter
2017-12-10 18:38:53 -06:00
Scott Lahteine
82ef6b5242
Add an option to specify "pulse" timer
2017-12-10 18:38:53 -06:00
Scott Lahteine
de3d3b9cb1
Put FORCE_INLINE before static
2017-12-08 00:46:22 -06:00
Scott Lahteine
2246316605
Fix name collision. timer_t => hal_timer_t
2017-11-05 19:31:07 -06:00
Thomas Moore
9e699811d2
Make LPC1768 pinmapping not specific to Re-ARM ( #8063 )
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* Merging early because of build failures. See #8105
* Make LPC1768 pinmapping not specific to Re-ARM
* Add HAL_PIN_TYPE and LPC1768 pin features
* M43 Updates
* Move pin map into pinsDebug_LPC1768.h
* Incorporate comments and M226
* Fix persistent store compilation issues
* Update pin features
* Update MKS SBASE pins
* Use native LPC1768 pin numbers in M42, M43, and M226
2017-10-26 13:37:26 -05:00
Bob-the-Kuhn
1beaef0452
fix 3S hang & enable SPLIT
2017-09-30 10:27:41 -05:00
Scott Lahteine
2af62a5d8d
Apply spacing, const to some HAL code
2017-08-31 18:33:07 -05:00
Christopher Pepper
44b0c186a6
HAL for Re:ARM (LPC1768) architecture
2017-08-31 18:21:38 -05:00
