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etagle 0566badcef Add memory barrier, optimal interrupt on-off ... Disabling an ISR on ARM has 3 instructions of latency. A Memory barrier is REQUIRED to ensure proper and predictable disabling. Memory barriers are expensive, so avoid disabling if already disabled (See https://mcuoneclipse.com/2015/10/16/nvic-disabling-interrupts-on-arm-cortex-m-and-the-need-for-a-memory-barrier-instruction/)		2018-05-20 02:39:34 -05:00
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endstop_interrupts.h	Use a macro for HAL header redirection (#10380)	2018-04-12 20:25:08 -05:00
fastio_Teensy.h	[2.0.x] AVR: Atomic bit set and clear of upper pin ports without critical section (#10502)	2018-04-24 13:45:43 -05:00
HAL.cpp	Use a macro for HAL header redirection (#10380)	2018-04-12 20:25:08 -05:00
HAL.h	Use a macro for HAL header redirection (#10380)	2018-04-12 20:25:08 -05:00
HAL_Servo_Teensy.cpp	Tweaks to Servo classes	2017-09-27 10:41:27 -05:00
HAL_Servo_Teensy.h	General cleanups for HAL	2018-01-15 02:46:37 -06:00
HAL_spi_Teensy.cpp	Use a macro for HAL header redirection (#10380)	2018-04-12 20:25:08 -05:00
HAL_timers_Teensy.cpp	Add memory barrier, optimal interrupt on-off	2018-05-20 02:39:34 -05:00
HAL_timers_Teensy.h	Reorder HAL timer header items	2018-05-13 16:50:39 -05:00
persistent_store_impl.cpp	Add MarlinSettings::validate()	2018-01-05 14:35:24 -06:00
pinsDebug.h	Use a macro for HAL header redirection (#10380)	2018-04-12 20:25:08 -05:00
SanityCheck.h	Add sanity checks for EMERGENCY_PARSER	2018-04-24 09:24:26 -05:00
spi_pins.h	HAL whitespace and style cleanup	2017-09-27 10:55:36 -05:00
watchdog_Teensy.cpp	HAL whitespace and style cleanup	2017-09-27 10:55:36 -05:00
watchdog_Teensy.h	Use a macro for HAL header redirection (#10380)	2018-04-12 20:25:08 -05:00