6f4873329e
In Travis we already test against 1.17.
188 lines
4.4 KiB
C
188 lines
4.4 KiB
C
/*
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u8g_com_atmega_hw_spi.c
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Universal 8bit Graphics Library
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Copyright (c) 2012, olikraus@gmail.com
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this list
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of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
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list of conditions and the following disclaimer in the documentation and/or other
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materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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Assumes, that
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MOSI is at PORTB, Pin 3
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and
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SCK is at PORTB, Pin 5
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Update for ATOMIC operation done (01 Jun 2013)
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U8G_ATOMIC_OR(ptr, val)
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U8G_ATOMIC_AND(ptr, val)
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U8G_ATOMIC_START()
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U8G_ATOMIC_END()
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*/
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#include "u8g.h"
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#if defined(__AVR__)
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#define U8G_ATMEGA_HW_SPI
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/* remove the definition for attiny */
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#if __AVR_ARCH__ == 2
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#undef U8G_ATMEGA_HW_SPI
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#endif
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#if __AVR_ARCH__ == 25
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#undef U8G_ATMEGA_HW_SPI
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#endif
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#endif
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#if defined(U8G_ATMEGA_HW_SPI)
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#include <avr/interrupt.h>
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#include <avr/io.h>
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static uint8_t u8g_atmega_spi_out(uint8_t data)
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{
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/* unsigned char x = 100; */
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/* send data */
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SPDR = data;
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/* wait for transmission */
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while (!(SPSR & (1<<SPIF)))
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;
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/* clear the SPIF flag by reading SPDR */
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return SPDR;
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}
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uint8_t u8g_com_atmega_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
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{
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switch(msg)
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{
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case U8G_COM_MSG_STOP:
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break;
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case U8G_COM_MSG_INIT:
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u8g_SetPIOutput(u8g, U8G_PI_CS);
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u8g_SetPIOutput(u8g, U8G_PI_A0);
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u8g_SetPIOutput(u8g, U8G_PI_RESET);
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U8G_ATOMIC_START();
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DDRB |= _BV(3); /* D0, MOSI */
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DDRB |= _BV(5); /* SCK */
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DDRB |= _BV(2); /* slave select */
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PORTB &= ~_BV(3); /* D0, MOSI = 0 */
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PORTB &= ~_BV(5); /* SCK = 0 */
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U8G_ATOMIC_END();
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u8g_SetPILevel(u8g, U8G_PI_CS, 1);
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/*
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SPR1 SPR0
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0 0 fclk/4 x
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0 1 fclk/16
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1 0 fclk/64
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1 1 fclk/128
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*/
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SPCR = 0;
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SPCR = (1<<SPE) | (1<<MSTR)|(0<<SPR1)|(0<<SPR0)|(0<<CPOL)|(0<<CPHA);
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#ifdef U8G_HW_SPI_2X
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SPSR = (1 << SPI2X); /* double speed, issue 89 */
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#endif
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break;
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case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
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u8g_SetPILevel(u8g, U8G_PI_A0, arg_val);
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break;
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case U8G_COM_MSG_CHIP_SELECT:
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if ( arg_val == 0 )
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{
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/* disable */
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u8g_SetPILevel(u8g, U8G_PI_CS, 1);
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}
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else
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{
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PORTB &= ~_BV(5); /* SCK = 0 */
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/* enable */
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u8g_SetPILevel(u8g, U8G_PI_CS, 0); /* CS = 0 (low active) */
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}
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break;
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case U8G_COM_MSG_RESET:
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u8g_SetPILevel(u8g, U8G_PI_RESET, arg_val);
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break;
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case U8G_COM_MSG_WRITE_BYTE:
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u8g_atmega_spi_out(arg_val);
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break;
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case U8G_COM_MSG_WRITE_SEQ:
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{
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register uint8_t *ptr = arg_ptr;
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while( arg_val > 0 )
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{
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u8g_atmega_spi_out(*ptr++);
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arg_val--;
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}
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}
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break;
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case U8G_COM_MSG_WRITE_SEQ_P:
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{
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register uint8_t *ptr = arg_ptr;
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while( arg_val > 0 )
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{
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u8g_atmega_spi_out(u8g_pgm_read(ptr));
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ptr++;
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arg_val--;
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}
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}
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break;
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}
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return 1;
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}
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#else
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uint8_t u8g_com_atmega_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
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{
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return 1;
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}
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#endif
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