etagle
0566badcef
Add memory barrier, optimal interrupt on-off
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Disabling an ISR on ARM has 3 instructions of latency. A Memory barrier is REQUIRED to ensure proper and predictable disabling. Memory barriers are expensive, so avoid disabling if already disabled (See https://mcuoneclipse.com/2015/10/16/nvic-disabling-interrupts-on-arm-cortex-m-and-the-need-for-a-memory-barrier-instruction/ )
2018-05-20 02:39:34 -05:00
Scott Lahteine
206014a957
Fix LPC176x timer functions
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Co-Authored-By: ejtagle <ejtagle@hotmail.com>
2018-05-20 01:58:51 -05:00
Scott Lahteine
d1b619be52
Standardize some hexadecimals
2018-05-08 09:19:18 -05:00
Scott Lahteine
ca577c1638
Fix up various spacing, comments, and typos
2018-03-07 21:09:08 -06:00
Scott Lahteine
90fa423737
Preliminary cleanup of #include structure ( #9763 )
2018-02-23 00:52:52 -06:00
Thomas Moore
e1fd9c08b3
[2.0.x] Add support for LPC1769 at 120 MHz ( #9423 )
2018-02-03 19:33:26 -06:00
teemuatlut
5c69d45f5b
[2.0.x] TMC2130 support for LPC platform ( #9114 )
2018-02-01 21:49:40 -06:00
Scott Lahteine
1c41de16d4
Trailing whitespace clean
2018-01-05 10:11:31 -06:00
Bob-the-Kuhn
5574fad69c
copy of PR #8991 code
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Formatting tweaks
correct array initialization & remove test code
2018-01-02 11:17:46 -06:00
Scott Lahteine
c8718aa111
Spacing, macros in LPC1768_PWM
2017-11-26 20:20:05 -06:00
Bob-the-Kuhn
59b32c25b5
MKS Sbase changes
2017-11-26 07:47:06 -06:00
Bob-the-Kuhn
9dad534f02
fixed
2017-11-21 21:37:20 -06:00
Scott Lahteine
f409147116
Fix P2_04, P2_05
2017-11-20 13:58:02 -06:00
Bob-the-Kuhn
c14000775b
PWM fixes, slow down fan update
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include LPC1768 syntax for M42
couple more pin_t changes
consistency
change M42 to R, P format
Revert "change M42 to R, P format"
This reverts commit 01f12f579ec9ccc1bb9126e68d2c86449e9b7edf.
2017-11-18 07:05:50 -06:00
Scott Lahteine
32512332df
Apply some formatting
2017-11-18 03:12:30 -06:00
Thomas Moore
13d839795c
LPC1768: updates to use the new pin_t typedef
2017-11-02 18:43:57 -05:00
Thomas Moore
9e699811d2
Make LPC1768 pinmapping not specific to Re-ARM ( #8063 )
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* Merging early because of build failures. See #8105
* Make LPC1768 pinmapping not specific to Re-ARM
* Add HAL_PIN_TYPE and LPC1768 pin features
* M43 Updates
* Move pin map into pinsDebug_LPC1768.h
* Incorporate comments and M226
* Fix persistent store compilation issues
* Update pin features
* Update MKS SBASE pins
* Use native LPC1768 pin numbers in M42, M43, and M226
2017-10-26 13:37:26 -05:00
